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Messages from 2525

Article: 2525
Subject: Re: [q][Reverse Engineering Protection]
From: sreeb@crash.cts.com (Ed Beers)
Date: 27 Dec 95 17:02:23 GMT
Links: << >>  << T >>  << A >>
In <4bqt7v$q99@earth.superlink.net> rob-l@superlink.net (Rob-L) writes:

>R. D. Davis (rdd@access1.digex.net) wrote:
>: This isn't protecting one's investment, it's cheating the purchaser
>: of ones products by making them unrepairable.
>[snip]

>When someone buys something, they should expect proper operation for some 
>time, but not forever.  If it can be repaired, great, but it can provide 
>value even if it fails later on.  That's not cheating the purchaser.

>With electronic components/assemblies, the manufacturer has configured 
>some materials for you, in order to perform some function you desire.  
>You pay them for the product, and you get that function for at least the 
>warranty period or some reasonable time for the type of device.

>So you make a protected chip, and make it to last some number of hours 
>minimum.  If it fails before then, it gets replaced free.  If it lasts 
>beyond its expected lifetime, that's free use of a product, which is a 
>benefit to the purchaser.  If a product is not used as intended and it 
>fails, or if it's tampered with and self-destructs, the purchaser eats 
>the loss.  That's the way it's always been.

Remember that the warranty period is not the same as the expected life
for most products.  I think that it is reasonable to expect most modern 
electronics equipment to last 10 to twenty years unless it has moving parts. 
If you are installing a battery that can't be replaced (since doing so would
lose the fpga program), then your packaging and sales literature should
reflect the finite life or need to periodically return the product to
the vendor.  As long as the customer can make an informed decision, I
don't see a problem.

Of course additional costs for batteries and warranty service along 
with customer aversion may make this a bad business decision for you.

Ed 


Article: 2526
Subject: Re: [q][Reverse Engineering Protection]
From: Mike Saltmarsh <r27863@email.sps.mot.com>
Date: 27 Dec 1995 19:46:20 GMT
Links: << >>  << T >>  << A >>
hbaker@netcom.com (Henry Baker) wrote:

>OK -- I just want to clarify one thing.  If the reverse-engineered-protected
>chip includes a clock that registers the number of cycles that the chip has been
>used, at which point it shuts itself down, never to work again, then this
>chip is the ideal to which your organization aspires??

Not especially if another vendor has a similar chip which lasts a long longer. Larger customers generally require long-term reliabil=
ity testing and want failure rates (mean time before failure, failure in time, etc). Something that craps out after a short time is =
going to stand out. Sure you could lie, but that's risking one hell of a lawsuit.

As an anology - how many times would you buy from a car manufacturer if their cars died shortly after the warranty period was up? I =
specifically avoid a few names of consumer electronics because of their poor reliability. So do others. Poor reliability is not a go=
od business practice.

Salty
-Opinions are my own-




Article: 2527
Subject: Re: Xiling 4025E routing info (Multiplier Arrays)
From: "Steve Knapp (Xilinx, Inc.)" <stevek>
Date: 28 Dec 1995 04:30:21 GMT
Links: << >>  << T >>  << A >>
milne@cv.com (Ewan D. Milne) wrote:

>Also, has anyone had any experience with implementing small
>multiplier arrays in the 4000E series devices?  I know that it
>is possible, but the question is whether the resulting performance
>is good enough to be worth a larger device size.

How big are the multiplier arrays.  We've recently completed some new
multiplier algorithms that provide good speed and density.  Also, we have
some innovating techniques for performing multiplication in DSP-type
applications.

How big of a multiplier do you need?  Word size?  Peformance requirements?
Is one of the inputs a fixed value?
   _
  / /\/  Steven K. Knapp               E-mail:  stevek@xilix.com 
  \ \    Corporate Applications Mgr.      Tel:  1-408-879-5172 
  / /    Xilinx, Inc.                     Fax:  1-408-879-4442
  \_\/\  2100 Logic Drive                 Web:  http://www.xilinx.com
         San Jose, CA 95124

=====================================================================



Article: 2528
Subject: Re: [q][Reverse Engineering Protection]
From: Bill Clark <wclark@duat.clark.com>
Date: Wed, 27 Dec 1995 22:47:47 -0700
Links: << >>  << T >>  << A >>
Rob-L wrote:
> .....................  If a product is not used as intended and it
> fails, or if it's tampered with and self-destructs, the purchaser eats
> the loss.  That's the way it's always been.

I'm old enough to see that this has only recently been more or
less true. As recently as the late 50s, warranties which mentioned
'tampering' were rare. Earlier than that, just about every family
had at least one fixer of things, and many families repaired all their
appliances, cars and radios (tube swapping at least).

I see the no-tampering warranty as a defensive reaction to this older
ethic and the changing attitude of the courts. Out with the hackers!

It's easy for us to accept a rapid obsolescence of entire maintenance
technologies, given the extremely high cost of keeping them around.
(E.g., can you find space in a 10u fab nowadays?) But the electronic
revolution is creating a new horde of capable fixers -- the stuff we
build is so complex to use that many feel that they have to understand
what they buy just to use it. Could it be that if maintenance doc
were as good as it used to be (per unit complexity), much electronic
junk could be reused? There is a latent urge to repair and remold.

Maybe the FPGA should be promoted as a digital recyclable. Laws could
be passed requiring reuse of not just parts, but macros as well.
Cascades of wierd counters could become a new art form. Symbols could
be collected like baseball cards. Maybe, "99.2% FPGAs (0.8% reusable
bits); approx. 85% recycled logic; 15% virgin gates."

It might be pretty hard to keep your bitstreams to yourself.
--
Bill Clark   Clark Associates., Inc.   wclark@clark.com   +1 303 444 1890


Article: 2529
Subject: Re: [q][Reverse Engineering Protection]
From: Bill Clark <wclark@duat.clark.com>
Date: Wed, 27 Dec 1995 22:51:17 -0700
Links: << >>  << T >>  << A >>
Rob-L wrote:
> .....................  If a product is not used as intended and it
> fails, or if it's tampered with and self-destructs, the purchaser eats
> the loss.  That's the way it's always been.

I'm old enough to see that this has only recently been more or
less true. As recently as the late 50s, warranties which mentioned
'tampering' were rare. Earlier than that, just about every family
had at least one fixer of things, and many families repaired all their
appliances, cars and radios (tube swapping at least).

I see the no-tampering warranty as a defensive reaction to this older
ethic and the changing attitude of the courts. Out with the hackers!

It's easy for us to accept a rapid obsolescence of entire maintenance
technologies, given the extremely high cost of keeping them around.
(E.g., can you find space in a 10u fab nowadays?) But the electronic
revolution is creating a new horde of capable fixers -- the stuff we
build is so complex to use that many feel that they have to understand
what they buy just to use it. Could it be that if maintenance doc
were as good as it used to be (per unit complexity), much electronic
junk could be reused? There is a latent urge to repair and remold.

Maybe the FPGA should be promoted as a digital recyclable. Laws could
be passed requiring reuse of not just parts, but macros as well.
Cascades of wierd counters could become a new art form. Symbols could
be collected like baseball cards. Maybe, "99.2% FPGAs (0.8% reusable
bits); approx. 85% recycled logic; 15% virgin gates."

It might be pretty hard to keep your bitstreams to yourself.
--
Bill Clark   Clark Associates., Inc.   wclark@clark.com   +1 303 444 1890


Article: 2530
Subject: Re: [q][Reverse Engineering Protection]
From: rob-l@superlink.net (Rob-L)
Date: 28 Dec 1995 07:06:09 GMT
Links: << >>  << T >>  << A >>
Henry Baker (hbaker@netcom.com) wrote:

: OK -- I just want to clarify one thing.  If the 
: reverse-engineered-protected chip includes a clock that registers the
: number of cycles that the chip has been used, at which point it shuts 
: itself down, never to work again, then this chip is the ideal to which
: your organization aspires??

It doesn't have to be that way unless you are charging for a specific 
length of service.  The point is that you as a manufacturer have the 
right to design your product any way you want, and if you have something 
that people value, they will buy it no matter how it's built.  If you are 
the only game in town for a particular device, you have much power until 
someone clones your stuff or beats you at your own game.  You always have 
to mind the market, or it may evaporate before your eyes.  People will 
give their money to whoever can do more for it.

Reverse-engineering protection isn't so much about chips that 
self-destruct at a preset time - it's about keeping the chip operating as 
long as it's used within the agreed terms of purchase -- up 'til it fails 
like all chips do.


Article: 2531
Subject: Re: [q][Reverse Engineering Protection]
From: lull@acm.org (John Lull)
Date: Thu, 28 Dec 1995 15:21:31 GMT
Links: << >>  << T >>  << A >>
In the waning years of the 20th century, rob-l@superlink.net (Rob-L)
wrote (with possible deletions):

> : As an anology - how many times would you buy from a car manufacturer 
> : if their cars died shortly after the warranty period was up?
> 
> Depends why it dies and how long the warranty is.  If it's an otherwise 
> great car, and it's a $.30 fuse that blows after 20,000 miles, is it 
> worth it to buy cars that you don't like just to avoid that?

This discussion was not about an easily-replaceable fuse.  It was
about designing a car (or other unit) using a device you know has a
severely limited life, and which you know will not be available for
replacement at the end of that lifetime.

It's about designing a car using an engine computer that you know is
going to quit in 5 years, when you know you won't be around to provide
replacement engine computers then.

That, IMO, is reprehensible.

If you're designing using components with known short lifetimes, they
darn well better be components that will be readily available and
reasonably inexpensive at the end of that lifetime.


Article: 2532
Subject: Need help: Actel "bibuf" working with Quicksim II (Men 8.4)
From: rjmyers@ti.com (Bob Myers)
Date: 28 Dec 1995 15:33:21 GMT
Links: << >>  << T >>  << A >>
I'm having problems with using "bibuf" primitives on an Actel schematic
simulation.  In the design that I'm trying to simulate, I have valid data
going to the "D" pins and can see either a "1" or "0" on the "E" pins,
however when I look at the traces for the "Y" or "PAD" pins, I always
see unknown values.  These values appear whether or not I have the pads
connected (via ripped bus) to the I/O pins of a dram chip (LMC smartmodel).


Is there anything special that has to be done to use bibufs in a schematic
that is going to be simulated?  

Any suggestions/advice welcomed.

-Bob



Article: 2533
Subject: Re: [q][Reverse Engineering Protection]
From: jeffh@oakhill-csic.sps.mot.com (Jeff Hunsinger)
Date: 28 Dec 1995 17:17:21 GMT
Links: << >>  << T >>  << A >>
In article q99@earth.superlink.net, rob-l@superlink.net (Rob-L) writes:
> When someone buys something, they should expect proper operation for some 
> time, but not forever.  If it can be repaired, great, but it can provide 
> value even if it fails later on.  That's not cheating the purchaser.
> 
> So you make a protected chip, and make it to last some number of hours 
> minimum.  If it fails before then, it gets replaced free.  If it lasts 
> beyond its expected lifetime, that's free use of a product, which is a 
> benefit to the purchaser.  If a product is not used as intended and it 
> fails, or if it's tampered with and self-destructs, the purchaser eats 
> the loss.  That's the way it's always been.

More justification for a disposable society. Just because "That's the way it's always
been" doesn't mean that's the way it always should be. How about designing something
to last? If the product is going to be useless in a short time, then provide for a
way to re-use the product in another way. A good example of this would be to re-use
an SRAM based FPGA in another product.

Sorry, this is starting to go a bit off topic, but I really hate to see the piles
of waste produced these days from short lived products.

Jeff




Article: 2534
Subject: Re: Career value: VHDL or Verilog?
From: stephen@srbailey.com (Stephen A. Bailey -- SRBailey Consulting)
Date: Thu, 28 Dec 1995 17:29:43 GMT
Links: << >>  << T >>  << A >>
weigand@ssnet.com (Steve Weigand) wrote:

>In article <Bb5Px*T-1@wolf359.exile.org>,
>Eric Edwards <eric@wolf359.exile.org> wrote:
>>I am fishing for trends here...
>>
>>In an effort to kick start my engineering career into existance, I intend
>>to learn one of these HDLs soon.  The question is, which one?  Industry
>>seems not to hire generalists so it seems best to put the energy into one
>>rather that divide among both.  Which HDL would provide the greatest benefit
>>for someone trying to break into logic design?
>
>Actually,  I think they both are suitably similar to simply say that if
>you learn one,  you've learned the other.  On your resume,  just put down,
>"VHDL/Verilog HDL".  

I completely disagree with this advice.  The advice is to lie on your
resume.  This severely impugns your integrity and is easily discovered
in an interview.  I come from the vendor side (VHDL specifically) and
I became very tired of seeing VHDL experience on a resume just to find
out that the job seeker simply looked at a VHDL book (several years
ago and "sorry, can't remember the title or author").  Needless to
say, these folks didn't make it very far in the hiring process.

Protect and nurture that which is your primary asset:  your
reputation.  If you want to be able to advertise VHDL and Verilog
knowledge and experience, then get it.  Do academic (or personal)
projects in both.  Be able to knowledgeably discuss the pros and cons
of both languages (from your experience).  Be prepared to do a
relatively short design problem in either language during an
interview.  Put nothing on your resume that you can't back up in an
interview!


=========================================================================
Stephen A. Bailey             pager: 408.271.7048
SRBailey Consulting           voice: 408.271.7048
911-C Apricot Avenue          fax:   408.377.1206
Campbell, CA 95008            data:  408.377.1206
email: stephen@srbailey.com   http:  www.srbailey.com
=========================================================================


Article: 2535
Subject: JOB> Sr. Digital Design Engineer
From: fsihunter@aol.com (FSI HUNTER)
Date: 28 Dec 1995 18:19:43 -0500
Links: << >>  << T >>  << A >>
Sr. Digital Design Engineer 
First Search Inc.
6584 N. Northwest Highway
Suite AC
Chicago, Illinois 60631

Contact: Al Katz
Phone: 312 774-0001
Fax: 312 774-5571
Business Line: Cellular, Wireless, Multi-Media, Datacommunications and
Telecommunications Executive Search. E-mail to fsihunter@aol.com

Description: 
We are looking for a candidate for our retained client who will be
involved
in  the designing of  "High Speed Internet Access" products. You would be 
the lead position to architect, design, and implement a high performance 
processor subsystem for an embedded telecom system. Must be able to 
develop processor and network management hardware requirements for a      
Network Element. Your job will be:1) An understanding of Motorola/Intel   
  
32-bit processors, flash/DRAM memory technology, FPGAs, networking        
  
components, and embedded controller design 2) Analyzing software/hardware 
  
architectural requirements 3) Developing detailed requirements for the    
  
common control processor boards and their interfaces 4) Researching and   
  
selecting components to meet all requirements, including
cost/availability.  
5) Designing, implementing, and testing the boards.                       
  
 
Qualifications:

 Ideal candidate would have:1) worked on embedded controller design 2)    
   
 Knowledge of fault-tolerant architecture 3) Experience with
harsh-environ-   
 ment issues, including temperature, humidity, power, ESD and EMI 4)worked
   
 with high-performance 32 bit processors 5) designed FPGAs for DRAM       
   
 controllers, DMA, and processor glue.                                    
   

For IMMEDIATE consideration fax, mail or E-mail resume to above location
ATTENTION - Al Katz, Suite AC.  Our preferred method is fax, if resumes 
are sent e-mail they are to be sent in plain ascii text format.

SPECIAL NOTE - Due to the amount of responses we get we will only contact
candidates who are qualified for this assignment, but we will notify you
as to other
assignments as your qualifications match up.

Company:     

First Search Inc, was founded in 1984 specializing in Executive search
primarily 
for Engineering, Operations, Technical, Sales and Marketing personnel. 
Each 
recruiter has 15+ years of search expertise.  Our clients include domestic
and
international companies representing the Cellular, Wireless, Multi-Media,
Datacommunications and Telecommunications industries.

First Search Inc. recruits on both permanent and temporary (contract)
assignments.  
All fees are employer paid.

Our exact specializations include the following -

*  Cellular
*  PCS
*  Wireless
*  Paging
*  ATM
*  SONET
*  Broadband
*  Fiber-to-the-curb
*  Intelligent Networks
*  Advanced Intelligent Networks
*  Network Management
*  Multi-Media

Salary: $80 to 100K, plus a stock equity plan upon hire.
Location: Northern California


Article: 2536
Subject: Re: Career value: VHDL or Verilog?
From: weigand@ssnet.com (Steve Weigand)
Date: 28 Dec 1995 23:50:57 -0500
Links: << >>  << T >>  << A >>
In article <30e2d26f.4382720@nntp.best.com>,
Stephen A. Bailey -- SRBailey Consulting <stephen@srbailey.com> wrote:
>weigand@ssnet.com (Steve Weigand) wrote:
>>Actually,  I think they both are suitably similar to simply say that if
>>you learn one,  you've learned the other.  On your resume,  just put down,
>>"VHDL/Verilog HDL".  
>
>I completely disagree with this advice.  The advice is to lie on your
>resume.  This severely impugns your integrity and is easily discovered
>in an interview. 


It's not really lying.  They *are* fairly similar to eachother,  enough
so that you can just say "Hardware Definition Languages (all types)". But
the big problem with writing that instead is that the computers that
scan your resume for keywords are NOT going to hit "VHDL" or "Verilog HDL".
And you may be out of luck,  because some human resources person doesn't
know that you mean you can do *either* VHDL or Verilog HDL when you put
down, "Hardware Definition Languages (all types)".  You're really saying
that you can do either one.  You might be an expert in one and a real rank
novice at the other,  but you and the rest of the universe realizes that
if you know one,  you can learn the other pretty fast.  That's what you
should explain on your interview.  They'll understand,  and they're not
going to think you're a liar.  Your intention is to make their search
easier.  Their computers will make the "hits" when it scans your resume,
that's all.  If the human resources people really need an expert in VHDL,
for example,  and you are an expert in Verilog HDL,  then they'll figure
that out about you and toss you out. 


> I come from the vendor side (VHDL specifically) and
>I became very tired of seeing VHDL experience on a resume just to find
>out that the job seeker simply looked at a VHDL book (several years
>ago and "sorry, can't remember the title or author").  Needless to
>say, these folks didn't make it very far in the hiring process.

Well,  then you find that out and move onto the next guy in your search.
No biggie.  But if they understand Verilog HDL,  and they've only looked
at a book on VHDL,  surely you'd have to admit that those folks could
probably pick up VHDL pretty fast (in maybe a day or two of study and
experimentation).  Now,  if you're dealing with private contractors or
consultants,  then you're looking specifically for real experts in VHDL,
so of course you'd toss the guy out.  But if you're looking for a full
time employee,  surely you can give the guy a couple days' slack enough
to familiarize himself with VHDL or Verilog -- just so long as they know
one,  they can pick up the other real easily.

Ciao for now,
  - Steve Weigand
    (weigand@marlin.ssnet.com)




Article: 2537
Subject: Re: Career value: VHDL or Verilog?
From: Russell Petersen <russp>
Date: 29 Dec 1995 15:55:11 GMT
Links: << >>  << T >>  << A >>
weigand@ssnet.com (Steve Weigand) wrote:
>In article <30e2d26f.4382720@nntp.best.com>,
>Stephen A. Bailey -- SRBailey Consulting <stephen@srbailey.com> wrote:
>>weigand@ssnet.com (Steve Weigand) wrote:
>>>Actually,  I think they both are suitably similar to simply say that if
>>>you learn one,  you've learned the other.  On your resume,  just put down,
>>>"VHDL/Verilog HDL".  
>>
>>I completely disagree with this advice.  The advice is to lie on your
>>resume.  This severely impugns your integrity and is easily discovered
>>in an interview. 
>
>
>It's not really lying.  They *are* fairly similar to eachother,  enough
>so that you can just say "Hardware Definition Languages (all types)". But
>the big problem with writing that instead is that the computers that
>scan your resume for keywords are NOT going to hit "VHDL" or "Verilog HDL".
>And you may be out of luck,  because some human resources person doesn't
>know that you mean you can do *either* VHDL or Verilog HDL when you put
>down, "Hardware Definition Languages (all types)".  You're really saying
>that you can do either one.  You might be an expert in one and a real rank
>novice at the other,  but you and the rest of the universe realizes that
>if you know one,  you can learn the other pretty fast.  That's what you
>should explain on your interview.  They'll understand,  and they're not
>going to think you're a liar.  Your intention is to make their search
>easier.  Their computers will make the "hits" when it scans your resume,
>that's all.  If the human resources people really need an expert in VHDL,
>for example,  and you are an expert in Verilog HDL,  then they'll figure
>that out about you and toss you out. 
>
>
>> I come from the vendor side (VHDL specifically) and
>>I became very tired of seeing VHDL experience on a resume just to find
>>out that the job seeker simply looked at a VHDL book (several years
>>ago and "sorry, can't remember the title or author").  Needless to
>>say, these folks didn't make it very far in the hiring process.
>
>Well,  then you find that out and move onto the next guy in your search.
>No biggie.  But if they understand Verilog HDL,  and they've only looked
>at a book on VHDL,  surely you'd have to admit that those folks could
>probably pick up VHDL pretty fast (in maybe a day or two of study and
>experimentation).  Now,  if you're dealing with private contractors or
>consultants,  then you're looking specifically for real experts in VHDL,
>so of course you'd toss the guy out.  But if you're looking for a full
>time employee,  surely you can give the guy a couple days' slack enough
>to familiarize himself with VHDL or Verilog -- just so long as they know
>one,  they can pick up the other real easily.
>
>Ciao for now,
>  - Steve Weigand
>    (weigand@marlin.ssnet.com)
>
>

I also submit that learning HDLs is not rocket science.  Unless you really need
a complete expert in one of the HDLs it is not that big of a deal.  I have used
and still use both VHDL and Verilog and neither has been what I call
particularly challenging mentally.  Lots of what is in the languages is not
usefull anyways if you care anything about synthesis.  If I was looking for a
designer I might care more about his/her synthesis skills (ie: Synopsys
skills).  This is an area which is more of an art than a science and so cannot
just easily be picked up.


-- 
Russell J. Petersen            *****     *****
Hewlett Packard ICBD           ***  /_  __ ***  email: russp@valhalla.fc.hp.com
3404 E. Harmony Rd.            **  / / /_/  **  Phone: (970) 229-7007 
Ft. Collins, CO 80525          ***    /    ***  fax:   (970) 229-6580
                               *****     *****



Article: 2538
Subject: Programmable Interconnect ICs
From: jw7348@medtronic.COM (Jeff Wilkinson)
Date: 29 Dec 1995 11:49:57 -0600
Links: << >>  << T >>  << A >>
Is anyone aware of chips for interconnecting the I/O of FPGAs to make a programmable array of FPGAs?  I need to connect 4 Xilinx parts into an array and it would be nice it the interconnect was programmable to avoid relaying out boards periodically.  Any help is appreciated.

Jeff Wilkinson




Article: 2539
Subject: Programmable Interconnect ICs - Repost
From: jw7348@medtronic.COM (Jeff Wilkinson)
Date: 29 Dec 1995 11:52:59 -0600
Links: << >>  << T >>  << A >>

<My apologies for sending this out without wrapping the lines.  Here it is
again for those that couldn't read it.>

 Is anyone aware of chips for interconnecting the I/O of FPGAs
to make a programmable array of FPGAs?  I need to connect 4 Xilinx
parts into an array and it would be nice it the interconnect was
programmable to avoid relaying out boards periodically.  Any elp is
appreciated.
 
Jeff Wilkinson


Article: 2540
Subject: Re: [q][Reverse Engineering Protection]
From: Henry Spencer <henry@zoo.toronto.edu>
Date: Fri, 29 Dec 1995 18:43:47 GMT
Links: << >>  << T >>  << A >>
In article <4beo90$b8c@access1.digex.net> rdd@access1.digex.net (R. D. Davis) writes:
>This isn't protecting one's investment, it's cheating the purchaser
>of ones products by making them unrepairable...

No, it just means that repair is dependent on subassemblies supplied by
the original vendor.  This is already the case for most electronics, and
has been for some time.  For example, it's been many years since service
documentation routinely included the contents of the ROMs.  If a ROM goes,
either you buy a replacement from the supplier or you salvage one from
another copy of the product (while praying that the rev levels aren't so
different as to make it incompatible); there is no do-it-yourself approach
available.

What's reprehensible is not the use of custom parts, but the inclusion
of an undocumented mechanism limiting the life of the product.
-- 
Look, look, see Windows 95.  Buy, lemmings, buy!   |       Henry Spencer
Pay no attention to that cliff ahead...            |   henry@zoo.toronto.edu


Article: 2541
Subject: Re: Programmable Interconnect ICs - Repost
From: jgt1@central.ERC.MsState.Edu (Joe G. Thompson)
Date: 29 Dec 1995 20:22:33 GMT
Links: << >>  << T >>  << A >>
>>>>> "Jeff" == Jeff Wilkinson <jw7348@medtronic.COM> writes:

    Jeff> <My apologies for sending this out without wrapping the
    Jeff> lines.  Here it is again for those that couldn't read it.>

    Jeff>  Is anyone aware of chips for interconnecting the I/O of
    Jeff> FPGAs to make a programmable array of FPGAs?  I need to
    Jeff> connect 4 Xilinx parts into an array and it would be nice it
    Jeff> the interconnect was programmable to avoid relaying out
    Jeff> boards periodically.  Any elp is appreciated.
 
    Jeff> Jeff Wilkinson


There is a company called Aptix that makes fairly dense programmable
interconnect chips.  I don't have any contact information available,
but they shouldn't be too difficult to locate.

Joe


Article: 2542
Subject: Gate-level description of 8051 to become available
From: icdcbob@netcom.com (Robert F. Calderwood)
Date: Fri, 29 Dec 1995 22:28:27 GMT
Links: << >>  << T >>  << A >>
We are near completion on a gate-level description
of the 8051-type microcontroller core which is
intended to be used for gate-array, FPGA, or standard
cell implementation. We would like to hear from those
who might be interested in using it. Respondents will
be sent a questionnaire to help us determine how and
in what form to make it available.

__________________________________________________________________________
 _   ____      __  ____    ____
| | |  __|    / / |  _ \  |  __|    Integrated Circuit Design Concepts
| | | |      / /  | | | | | |      12502 Carmel Way, Santa Ana CA 92705
| | | |__   / /   | |_| | | |__   Voice (714) 633-0455 Fax (714) 838-7705
|_| |____| /_/    |____/  |____|
_________________________________________________________________________

-- 
__________________________________________________________________________
 _   ____      __  ____    ____
| | |  __|    / / |  _ \  |  __|    Integrated Circuit Design Concepts
| | | |      / /  | | | | | |      12502 Carmel Way, Santa Ana CA 92705
| | | |__   / /   | |_| | | |__   Voice (714) 633-0455 Fax (714) 838-7705
|_| |____| /_/    |____/  |____|
_________________________________________________________________________


Article: 2543
Subject: Re: [q][Reverse Engineering Protection]
From: bw946@tali.uchsc.edu (Raymond K. Petry)
Date: 30 Dec 1995 00:36:46 GMT
Links: << >>  << T >>  << A >>
A priori I'd suggest the usual passivation coatings which can't be removed ...
essentially the camouflage you suggest ... I'd suppose you could computer-
generate logic-like active patterns that would require de-crypt-ing the useful
portion of logic (against reverse-'engineering' not against duplication, if 
you mean specifically someone figuring out what you did as an engineer)
... you could go really far-out and mu'x all the logic on the chip via pico-
controller or p'n' sequenced logic utilization: it's something a computer
could generate from your design, and you wouldn't have to go through it.
(might be a little slow in the early hard-encryption scheme(r)s ...)

Of course, you may have been asking about all those 'engineer's who read the
thick how-to books full of thousands of 'known' designs from hartley and 
colpitts oscillators to 'you-name-it'
-Ray

John Souders (frodo4@ix.netcom.com) wrote:
: In <4beo90$b8c@access1.digex.net> rdd@access1.digex.net (R. D. Davis)
: writes: 
: >
: >In article <DI6H3x.5Lz@world.std.com>,
: >John Cooley <jcooley@world.std.com> wrote:
: >>Jyri Hamalainen <jyrih@cat.co.za> wrote:
: >>>Does anyone here know anything about protecting ASIC's from reverse 
: >>>engineering? OR logic camourflaging? With modern technologies such
: as 
: >>>electron beam induced current imaging and Charge induced voltage 
: >>>alteration (Scania Labs), I suppose there are no more solutions to 
: >>>protecting ones investment?
: >
: >Anyone who designs such equipment for commercial or cosumer use is a
: >creep and an idiot.
: You may have not have noticed that the question referred to ASICS,
: which by their very nature, cannot easily be replaced by off the shelf
: stuff. 
: They are custom parts. (application specific integraded circuits)
: Typically a lot of time and money goes into designing these parts. 

--
Cordially and sincerely yours, Mr. Raymond Kenneth Petry, CS
                  Principal Successor to Rev. Mary Baker Eddy
                      The Son Dey School of Christ Science
            		 http://www.serve.com/~lambhorn 
			     lambhorn@mail.serve.com


Article: 2544
Subject: Re: Programmable Interconnect ICs
From: "Steve Knapp (Xilinx, Inc.)" <stevek>
Date: 30 Dec 1995 02:06:48 GMT
Links: << >>  << T >>  << A >>
jw7348@medtronic.COM (Jeff Wilkinson) wrote:

> Is anyone aware of chips for interconnecting the I/O of FPGAs
>to make a programmable array of FPGAs?  I need to connect 4 Xilinx
>parts into an array and it would be nice it the interconnect was
>programmable to avoid relaying out boards periodically.  Any elp is
>appreciated.
> 
>Jeff Wilkinson

-- There are at least two companies that make reconfigurable interconnect
chips.  Generically, they are called Field Programmable InterConnect (FPIC)
devices.

One company is called Aptix.  They not only make devices.  They have various 
prototype cards that contain sockets for multiple Xilinx chips plus an FPIC
device.  The Aptix board is called an 'AP4' board.

I couldn't find the Aptix Web site (if they have one).  However, I found a
site that has a picture of the board as used in their system.  Look at

http://www.cit.gu.edu.au/~davida/guess.html

for more information.  The Aptix phone number is (408) 428-6200.

The other company is called I-Cube.  The only number that I have is about
a year old.  The I-Cube number may be (408) 986-1077.
=====================================================================
   _
  / /\/  Steven K. Knapp               E-mail:  stevek@xilinx.com 
  \ \    Corporate Applications Mgr.      Tel:  1-408-879-5172 
  / /    Xilinx, Inc.                     Fax:  1-408-879-4442
  \_\/\  2100 Logic Drive                 Web:  http://www.xilinx.com
         San Jose, CA 95124

=====================================================================



Article: 2545
Subject: Re: Gate-level description of 8051 to become available
From: larrycam@ix.netcom.com (Larry Cameron)
Date: 30 Dec 1995 03:16:48 GMT
Links: << >>  << T >>  << A >>
In article <icdcbobDKDD3G.Bvr@netcom.com>,
   icdcbob@netcom.com (Robert F. Calderwood) wrote:
>We are near completion on a gate-level description
>of the 8051-type microcontroller core which is
>intended to be used for gate-array, FPGA, or standard
>cell implementation. We would like to hear from those
>who might be interested in using it. Respondents will
>be sent a questionnaire to help us determine how and
>in what form to make it available.

cool beans!  how about making it free for the taking at the vhdl.org site?  
just a thought...

Regards,
L.Cameron


Article: 2546
Subject: Re: Career value: VHDL or Verilog?
From: tldraben@teleport.com (Tom Drabenstott)
Date: 30 Dec 1995 09:53:22 GMT
Links: << >>  << T >>  << A >>
Eric Edwards (eric@wolf359.exile.org) wrote:
: I am fishing for trends here...

: In an effort to kick start my engineering career into existance, I intend
: to learn one of these HDLs soon.  The question is, which one?  Industry

I would recommend learning VHDL first.  In my opinion, after doing large
projects in each, VHDL lends itself better to conceptualizing the
actual logic being designed.  When programming Verilog, I tend to
think more in terms of a procedural language.  In the end, I try to get
my Verilog code to look more VHDLish.

Solid experience in either is worth much more than just reading about one or
the other. 

                        Have fun,

                                    -- Tom Drabenstott


Article: 2547
Subject: Re: Career value: VHDL or Verilog?
From: jlodman@alumni.caltech.edu (Michael Lodman)
Date: 30 Dec 1995 16:16:17 GMT
Links: << >>  << T >>  << A >>
Steve Weigand <weigand@ssnet.com> wrote:
>that you can do either one.  You might be an expert in one and a real rank
>novice at the other,  but you and the rest of the universe realizes that
>if you know one,  you can learn the other pretty fast.  That's what you
>should explain on your interview.  They'll understand,  and they're not
>going to think you're a liar.  

Steve, when I was a hiring manager, nothing would get you flushed out
of consideration for a job opening faster than having something on
your resume regarding a skill or technical knowledge that wasn't true.
If you put down VHDL, you will be expected to demonstrate it. If you
put down Verilog, the same holds true. Don't put yourself in the
embarrassing position of being forced to explain why you lied because
you'll just be wasting time. I've got a fair idea how long it takes
a Verilog programmer to learn VHDL and so forth - if I want someone
who knows either I'll state it so.

-- 
"There is a certain level of self-imposed ignorance that I have no desire 
to try and correct." - Chris Wolf (self-descriptive? you make the call!)


Article: 2548
Subject: Re: Need help: Actel "bibuf" working with Quicksim II (Men 8.4)
From: tims@synopsys.com (Tim Schneider)
Date: 30 Dec 1995 23:43:14 GMT
Links: << >>  << T >>  << A >>
In article <4budc1$llq@mksrv1.dseg.ti.com>, rjmyers@ti.com (Bob Myers) wrote:

> >see unknown values.  These values appear whether or not I have the pads
> >connected (via ripped bus) to the I/O pins of a dram chip (LMC smartmodel).
> >
> >
> >Is there anything special that has to be done to use bibufs in a schematic
> >that is going to be simulated?  

You might check the type of force (1 and 0) applied to the bibuf
I remember in some cases in order to not propogate Xz, we had to 
set the force type to "wired"  Use the AMPLE command setup_forces
I believe.

The other thing you might try is doing an init in QsimII before
running your session.  I have seen this clear out weird errors 
as well.

good luck, hope this helps.

 -tim

-- 
tims@synopsys.com
Southwest Area Modeling Specialist
602.834.3837 (Ph)   602.834.4177  (Fax)


Article: 2549
Subject: Re: Career value: VHDL or Verilog?
From: suzanne@world.std.com (suzanne M southworth)
Date: Sun, 31 Dec 1995 04:20:45 GMT
Links: << >>  << T >>  << A >>

I would suggest that you pick Verilog and I think everyone would agree
that it is an easier tool to use. Try to find a one day Verilog vs.VHDL
class from a consultant and then you will see for yourself why everyone
is using Verilog.

Good Luck with your decision.

Sue!

Steve Weigand (weigand@ssnet.com) wrote:
: In article <30e2d26f.4382720@nntp.best.com>,
: Stephen A. Bailey -- SRBailey Consulting <stephen@srbailey.com> wrote:
: >weigand@ssnet.com (Steve Weigand) wrote:
: >>Actually,  I think they both are suitably similar to simply say that if
: >>you learn one,  you've learned the other.  On your resume,  just put down,
: >>"VHDL/Verilog HDL".  
: >
: >I completely disagree with this advice.  The advice is to lie on your
: >resume.  This severely impugns your integrity and is easily discovered
: >in an interview. 


: It's not really lying.  They *are* fairly similar to eachother,  enough
: so that you can just say "Hardware Definition Languages (all types)". But
: the big problem with writing that instead is that the computers that
: scan your resume for keywords are NOT going to hit "VHDL" or "Verilog HDL".
: And you may be out of luck,  because some human resources person doesn't
: know that you mean you can do *either* VHDL or Verilog HDL when you put
: down, "Hardware Definition Languages (all types)".  You're really saying
: that you can do either one.  You might be an expert in one and a real rank
: novice at the other,  but you and the rest of the universe realizes that
: if you know one,  you can learn the other pretty fast.  That's what you
: should explain on your interview.  They'll understand,  and they're not
: going to think you're a liar.  Your intention is to make their search
: easier.  Their computers will make the "hits" when it scans your resume,
: that's all.  If the human resources people really need an expert in VHDL,
: for example,  and you are an expert in Verilog HDL,  then they'll figure
: that out about you and toss you out. 


: > I come from the vendor side (VHDL specifically) and
: >I became very tired of seeing VHDL experience on a resume just to find
: >out that the job seeker simply looked at a VHDL book (several years
: >ago and "sorry, can't remember the title or author").  Needless to
: >say, these folks didn't make it very far in the hiring process.

: Well,  then you find that out and move onto the next guy in your search.
: No biggie.  But if they understand Verilog HDL,  and they've only looked
: at a book on VHDL,  surely you'd have to admit that those folks could
: probably pick up VHDL pretty fast (in maybe a day or two of study and
: experimentation).  Now,  if you're dealing with private contractors or
: consultants,  then you're looking specifically for real experts in VHDL,
: so of course you'd toss the guy out.  But if you're looking for a full
: time employee,  surely you can give the guy a couple days' slack enough
: to familiarize himself with VHDL or Verilog -- just so long as they know
: one,  they can pick up the other real easily.

: Ciao for now,
:   - Steve Weigand
:     (weigand@marlin.ssnet.com)






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