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Messages from 9800

Article: 9800
Subject: Re: XactStep6 - The cure for a dongle
From: z80@ds2.com (Peter)
Date: Mon, 06 Apr 1998 14:19:07 GMT
Links: << >>  << T >>  << A >>
Is this Orcad Express 7.1?

Peter.

Return address is invalid to help stop junk mail.
E-mail replies to zX80@digiYserve.com but
remove the X and the Y.
Article: 9801
Subject: Re: Counter problem ?
From: "Richard Iachetta" <iachetta@us.ibm.com>
Date: 6 Apr 1998 15:12:09 GMT
Links: << >>  << T >>  << A >>
Alexandre Pechev <A.Pechev@rdg.ac.uk> wrote in article
<6g8d7m$e7$1@susscsc1.reading.ac.uk>...
> Hi Everyone,
> I am designing a counter using Lattice isp1016 CPLD. Very strange (for me)
> when the clk input was pulled up or even down, the counter was continue to
> increment its value with random increments. I have checked the counter
 
What was the value of the pullup and pulldown resistors when you pulled the
clock input up and down?  This is indeed strange.  Unless your power supply is
ridiculously noisy, the pullup resistor should work fine as it provides a bit
of inductance and capacitance itself.  Voltage spikes on the pulled up clock
would have to get down pretty low (less than 1 or 2 volts) to do any harm.  If
your power rail really does this then you have more problems than just this. 
Another question: is the 1016 itself properly decoupled power to gnd?

Article: 9802
Subject: Upcoming Programmable Logic Events in April 1998 (FPGA, CPLD)
From: "Steven K. Knapp" <sknapp@optimagic.com>
Date: Mon, 6 Apr 1998 08:16:19 -0700
Links: << >>  << T >>  << A >>
April, 1998

IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM'98)
15-17 April, 1998, Napa Valley, California, USA.

"Take It to the Next Level with Atmel CPLDs!", 16 April, 1998. Web-based
seminar requires pre-registration and download.

"Cypress Semiconductor's VHDL Primer", 7 April, 1998. Web-based seminar
requires pre-registration and download.

See http://www.optimagic.com/conferences.html#Apr98 for additional
information and applicable web links.

-----------------------------------------------------------
Steven K. Knapp
OptiMagic, Inc. -- "Great Designs Happen 'OptiMagic'-ally"
E-mail:  sknapp@optimagic.com
   Web:  http://www.optimagic.com
-----------------------------------------------------------



Article: 9803
Subject: Re: Counter problem ?
From: Gareth Baron <gareth.baron@eng.efi.com>
Date: Mon, 06 Apr 1998 11:25:02 -0700
Links: << >>  << T >>  << A >>
The questions I would ask myself are;

Do you have noise on you're clk pin ?
Do you have ground bounce ?
Have you connected all the GND pins correctly ?
Have you connected all the VCC pins correctly ?

-------------------
Gareth Baron

Alexandre Pechev wrote:

> Hi Everyone,
> I am designing a counter using Lattice isp1016 CPLD. Very strange (for me)
> when the clk input was pulled up or even down, the counter was continue to
> increment its value with random increments. I have checked the counter
> design :o) many times - everything was OK. Finally I have decided to put 1nF
> between clk and ground.
> Now the circuit is working properly ... but I still have not answer why...?
> The clk input was NOT nosy at all !
> I really appreciate if someone give me an answer and are there any tricks,
> tips or "recommended design" with Lattice's CPLD...
> Thanks!
> Alex



Article: 9804
Subject: Re: XactStep6 - The cure for a dongle
From: Rick Collins <redsp@writeme.com>
Date: Mon, 06 Apr 1998 14:28:15 -0400
Links: << >>  << T >>  << A >>
Peter wrote:

> Is this Orcad Express 7.1?
>
> Peter.
>
> Return address is invalid to help stop junk mail.
> E-mail replies to zX80@digiYserve.com but
> remove the X and the Y.

Yes, Orcad Express 7.11 to be exact.

Rick Collins

redsp@writeme.com



Article: 9805
Subject: Effects of IC production
From: Eric Lussier <elussier@chat.carleton.ca>
Date: Mon, 06 Apr 1998 21:41:04 +0000
Links: << >>  << T >>  << A >>
I'm a third Computer Systems engineering student and I have to write a 
paper about the positive and negative effects of ICs on humanity. I'm 
thinking the only negative effect would be the environmental issues in 
producing chips. Unfortunetely it's not that easy to find books or 
websites that contain detailed info about this subject. Could someone 
please reffer me to a site or some books that may be able to help me 
out.

Thanks in advance for any help that can be given.

struggling student,
Eric Lussier

elussier@chat.carleton.ca
Article: 9806
Subject: Re: XactStep6 - The cure for a dongle
From: "Austin Franklin" <darkroo8m@ix.netcom.com>
Date: 7 Apr 1998 02:30:13 GMT
Links: << >>  << T >>  << A >>
> There have been Ethernet network cards with a customer-settable serial
> number.

Can you name one, or give me a URL that shows this to be true?  Why would
they want anyone to be able to set their own serial number?  That seems
like a silly thing for a manufacturer to allow.  Anyway, I'm not talking
about a serial number (but there is no reason why one couldn't use the MAC
address as a serial number too..as they are intentionally unique).

> Also, the s/n is normally stored in a little serial EEPROM,
> and one could always make a copy of that before installing the card,
> allowing the card address to be duplicated if necessary.

Again, this is not a serial number, I am referring to the MAC address
(sometimes referred to as the 'Ethernet Address' or EA.  See RFC 1042 if
you don't know what a MAC address is).  It is a bit of work to duplicate
this....and you have to have a valid license in the first place, so the
source is easily traceable.

The MAC address PROMS are SMD, and are soldered in, and you would have to
unsolder it, or hook it up to a programmer somehow (can be done, but it
isn't all that easy), read it in, and then write it out.  Also, then you
couldn't have these cards on the same network.  It is almost impossible to
do on a PCMCIA/CardBus Network adapter.

It isn't very likely this will lead to wide spread piracy in the
corporate/professional environment.

Austin Franklin
darkroom@ix.netcom.com

Article: 9807
Subject: Re: XactStep6 - The cure for a dongle
From: "Austin Franklin" <darkroo8m@ix.netcom.com>
Date: 7 Apr 1998 02:36:10 GMT
Links: << >>  << T >>  << A >>
Peter <z80@ds2.com> wrote in article
<352afcd1.149916047@news.netcomuk.co.uk>...
> Yes, APR did well on smaller devices. As they got bigger, it had more
> problems. On one 3090 design I did, it could not get past 60% and I
> had to purchase XACT6. Admittedly there was a lot of random logic
> there, and some buses.

I benchmarked the NeoCAD router and the Xilinx router, and found it was
better on unplaced designs, and BOTH worked (much better) the same on
designs with the design having placement done by the designer for all
regular structures (busses, registers, etc...and I/O pins).

Their software had an understanding of regular structures, and the Xilinx
tools didn't.  They certainly used this to their advantage...but no one I
know who really knew how to do a little work up front (ie, placement) saw
any actual gains from the NeoCAD routers.

Austin Franklin
darkroom@ix.netcom.com



Article: 9808
Subject: Re: Effects of IC production
From: msimon@tefbbs.com
Date: Tue, 07 Apr 1998 03:39:51 GMT
Links: << >>  << T >>  << A >>
You might try reading '1984' by George Orwell. 


Eric Lussier <elussier@chat.carleton.ca> wrote:

>I'm a third Computer Systems engineering student and I have to write a 
>paper about the positive and negative effects of ICs on humanity. I'm 
>thinking the only negative effect would be the environmental issues in 
>producing chips. Unfortunetely it's not that easy to find books or 
>websites that contain detailed info about this subject. Could someone 
>please reffer me to a site or some books that may be able to help me 
>out.
>
>Thanks in advance for any help that can be given.
>
>struggling student,
>Eric Lussier
>
>elussier@chat.carleton.ca

Opinions expressed herein are solely my own and may or may not reflect my opinion at this particular time or any other.

Article: 9809
Subject: Synthesis tool for XC6200
From: Seonil Choi <seonil@congo.usc.edu>
Date: Mon, 06 Apr 1998 23:14:04 -0700
Links: << >>  << T >>  << A >>
Dear all,

I am looking for a synthesis tool for Xilinx XC6200 series.
Currently, I am using VELAB for VHDL codes and XACT6000 for place &
route.
However, as fas as know,  VELAB only takes structural VHDL codes with
gate-level components.

I would like to know how to synthesize a behavioral VHDL code for
XC6200.

Thank you.

Seonil Choi.
SC

Article: 9810
Subject: Re: Effects of IC production
From: jhallen@world.std.com (Joseph H Allen)
Date: Tue, 7 Apr 1998 06:53:11 GMT
Links: << >>  << T >>  << A >>
In article <35299fcd.2009650@news.megsinet.net>,  <msimon@tefbbs.com> wrote:

>You might try reading '1984' by George Orwell. 

No no, take a look at 'Star Trek' by Gene Rodenbury.

>Eric Lussier <elussier@chat.carleton.ca> wrote:
>
>>I'm a third Computer Systems engineering student and I have to write a 
>>paper about the positive and negative effects of ICs on humanity. I'm 
>>thinking the only negative effect would be the environmental issues in 
>>producing chips. Unfortunetely it's not that easy to find books or 
>>websites that contain detailed info about this subject. Could someone 
>>please reffer me to a site or some books that may be able to help me 
>>out.

>>Thanks in advance for any help that can be given.

>>struggling student,
>>Eric Lussier

>>elussier@chat.carleton.ca

>Opinions expressed herein are solely my own and may or may not reflect my
>opinion at this particular time or any other.
-- 
/*  jhallen@world.std.com (192.74.137.5) */               /* Joseph H. Allen */
int a[1817];main(z,p,q,r){for(p=80;q+p-80;p-=2*a[p])for(z=9;z--;)q=3&(r=time(0)
+r*57)/7,q=q?q-1?q-2?1-p%79?-1:0:p%79-77?1:0:p<1659?79:0:p>158?-79:0,q?!a[p+q*2
]?a[p+=a[p+=q]=q]=q:0:0;for(;q++-1817;)printf(q%79?"%c":"%c\n"," #"[!a[q-1]]);}
Article: 9811
Subject: Re: XactStep6 - The cure for a dongle
From: z80@ds2.com (Peter)
Date: Tue, 07 Apr 1998 08:10:01 GMT
Links: << >>  << T >>  << A >>

>Can you name one, or give me a URL that shows this to be true?  Why would
>they want anyone to be able to set their own serial number?  That seems
>like a silly thing for a manufacturer to allow.  Anyway, I'm not talking
>about a serial number (but there is no reason why one couldn't use the MAC
>address as a serial number too..as they are intentionally unique).

Sorry, it was the Ethernet *address* I was referring to - this is what
M1.x can be locked to, as an alternative to the C: volume serial
number.

Every Ethernet card, I would think, has a user-settable address. The
alternative is for the manufacturer to pre-program every EEPROM prior
to soldering - much less likely. The problem is that I don't know of
any Ethernet card for which this software is freely available.

>Again, this is not a serial number, I am referring to the MAC address
>(sometimes referred to as the 'Ethernet Address' or EA.  See RFC 1042 if
>you don't know what a MAC address is).  It is a bit of work to duplicate
>this....and you have to have a valid license in the first place, so the
>source is easily traceable.

As I say above, sorry for my mis-use of terminology. It would not be
hard to locate the MAC in the EEPROM, unless it was deliberately
encoded. The MAC is usually displayed by any diagnostic s/w which
comes with the card.

Many newer EPROM/PLD programmers do support serial EEPROMs.

As for producing a duplicate card, you don't need a license. The
licensing issue comes up only if you are going to manufacture Ethernet
cards, in which case you need to purchase a block of addresses.

>Also, then you
>couldn't have these cards on the same network. 

This is very true. I was thinking of merely safeguarding the Xilinx
s/w, by creating a duplicate NIC.

However, one can have >1 NIC under Windoze-NT4. Obviously, the one
with the duplicated address would remain unconnected. But I have no
idea which of the two NICs the Xilinx s/w will interrogate.

> It is almost impossible to
>do on a PCMCIA/CardBus Network adapter.

Also true.

>It isn't very likely this will lead to wide spread piracy in the
>corporate/professional environment.

Quite. Xilinx software is already dongled by something very hard to
duplicate: a Xilinx FPGA :)

My copy of M1.4 is locked to the C: drive serial number. This is easy
to edit if required, and I am reasonably happy with that.
 

Peter.

Return address is invalid to help stop junk mail.
E-mail replies to zX80@digiYserve.com but
remove the X and the Y.
Article: 9812
Subject: Re: Xilinx routing optimization?
From: peterc <peterc@hmgcc.gov.uk>
Date: Tue, 07 Apr 1998 10:03:38 +0100
Links: << >>  << T >>  << A >>
Jacob W Janovetz wrote:
> 
<snip>
> 
> >Are you using the divided clock as an internal clock (connected to CLB
> >clks)?
> 
> >If so you should add a gclk or aclk (3k) or bufgs/bufgp (4k). This will
> >gaurentee low clock skew between all clock pins, which could be your
> >real problem. Is clock skew or clock delay the problem?
> 
> As I said, some of the signal are routed all over the damn place
> and aquire about 17ns of delay.  Some only get up to 9ns.  I've
> added buffers when needed, but this is a case where I can get away
> without using one.  A buffer would help of course, but when the
> tools route poorly, I'd like a way to fix it.

Generally, it will _always_ be best to use the buffers for the most
relevant signals, usually the system clock(s). Using the global clock
nets will help the tools to route the design better.

Have you added appropriate timespecs to all the signals? If you
constrain the timing of all signals then the ones that you require to
have short delays will be routed to meet that delay, while the ones that
you can tolerate being slower will possibly be routed with longer
delays. If you don't specify any timing constraint then the tools assume
every signal is of the same priority, not necessarily routing the
important signals carefully.

Is your circuit syncronous? If not could it be made so, meaning that the
delays become unimportant?
Article: 9813
Subject: Re: VHDL in synopsys -> M1
From: Ho Siu Hung <eg_hsh@stu.ust.hk>
Date: Tue, 7 Apr 1998 17:49:02 +0800
Links: << >>  << T >>  << A >>
On Mon, 6 Apr 1998, Koenraad Schelfhout VH14 8993 wrote:
> Two suggestions :
> 
>  either : do a "write -hierarchy"
> 
>  or (as Xilinx suggests) :
>     ungroup -flatten -all
>     write xnf output (here you have only 1 level)

As all the logical errors are related to bus type (std_logic_vector), I
come up with a solution that change all the codes not using bus type, and
the problem is solved.  However, the ungroup method seems to be the
fastest and best method... 

-------------------------------------------------------------------------------
| Best Regards, 	  +--------+   | Email: eg_hsh@stu.ust.hk	      |
| David Ho		  | к |   |	cshosh@cs.ust.hk	      |
| Ho Siu Hung		  +--------+   |   	                              |
| University of Science and Technology |  ICQ#: 798357			      |
| Computer Engineering Year 3 (CPEG)   =======================================|
-------------------------------------------------------------------------------


Article: 9814
Subject: Re: Synthesis tool for XC6200
From: kukuk@weber.uni-paderborn.de (Thorsten Kukuk)
Date: 7 Apr 1998 09:53:33 GMT
Links: << >>  << T >>  << A >>
Hello,

Seonil Choi (seonil@congo.usc.edu) wrote:
: Dear all,
: 
: I am looking for a synthesis tool for Xilinx XC6200 series.
: Currently, I am using VELAB for VHDL codes and XACT6000 for place &
: route.
: However, as fas as know,  VELAB only takes structural VHDL codes with
: gate-level components.
: 
: I would like to know how to synthesize a behavioral VHDL code for
: XC6200.

The XACT6000 toolkit for SunOS contains libraries for Synopsys. With
this libraries and Synopsys, i create VHDL code with gate-level
components and use velab to create the EDIF code. I wasn't able to
read the Synopsys EDIF code with XACT6000, so I have to use VELAB
for that. Has anybody else this working ?

  Thorsten

-- 
Thorsten Kukuk  kukuk@vt.uni-paderborn.de
                http://www-vt.uni-paderborn.de/~kukuk/
Linux is like a Vorlon.  It is incredibly powerful, gives terse,
cryptic answers and has a lot of things going on in the background.
Article: 9815
Subject: Re: Effects of IC production
From: "rk" <stellare@erols.com.NOSPAM>
Date: 7 Apr 1998 09:55:23 GMT
Links: << >>  << T >>  << A >>
Joseph H Allen <jhallen@world.std.com> wrote in article
<Er174n.Hq@world.std.com>...
: In article <35299fcd.2009650@news.megsinet.net>,  <msimon@tefbbs.com>
wrote:
: 
: >You might try reading '1984' by George Orwell. 
: 
: No no, take a look at 'Star Trek' by Gene Rodenbury.

no, no, no!!!!!!  terminator series with arnold (although i'm a fan of the
above 2). arnold kicked their butts in the movie versions.

Article: 9816
Subject: Re: Effects of IC production
From: Ed McCauley <edmccauley@bltinc.com>
Date: Tue, 07 Apr 1998 07:58:03 -0400
Links: << >>  << T >>  << A >>
This is a multi-part message in MIME format.
--------------256C1C461668F40ACEEC8E79
Content-Type: text/plain; charset=us-ascii
Content-Transfer-Encoding: 7bit

BRAVO!


msimon@tefbbs.com wrote:
> 
> You might try reading '1984' by George Orwell.
> 
> Eric Lussier <elussier@chat.carleton.ca> wrote:
> 
> >I'm a third Computer Systems engineering student and I have to write a
> >paper about the positive and negative effects of ICs on humanity. I'm
> >thinking the only negative effect would be the environmental issues in
> >producing chips. Unfortunetely it's not that easy to find books or
> >websites that contain detailed info about this subject. Could someone
> >please reffer me to a site or some books that may be able to help me
> >out.
> >
> >Thanks in advance for any help that can be given.
> >
> >struggling student,
> >Eric Lussier
> >
> >elussier@chat.carleton.ca
> 
> Opinions expressed herein are solely my own and may or may not reflect my opinion at this particular time or any other.

-- 
Ed McCauley
President
Bottom Line Technologies Inc.
Specializing Exclusively in Xilinx Design, Development and Training
Voice: (500) 447-FPGA, (908) 996-0817
FAX:   (908) 996-0817
--------------256C1C461668F40ACEEC8E79
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Content-Transfer-Encoding: 7bit
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n:              McCauley;Ed
org:            Bottom Line Technologies Inc.
email;internet: edmccauley@bltinc.com
title:          President
x-mozilla-cpt:  ;0
x-mozilla-html: TRUE
version:        2.1
end:            vcard


--------------256C1C461668F40ACEEC8E79--

Article: 9817
Subject: Re: XactStep6 - The cure for a dongle
From: "Austin Franklin" <darkroo8m@ix.netcom.com>
Date: 7 Apr 1998 12:24:03 GMT
Links: << >>  << T >>  << A >>
> 
> Every Ethernet card, I would think, has a user-settable address. The
> alternative is for the manufacturer to pre-program every EEPROM prior
> to soldering - much less likely. The problem is that I don't know of
> any Ethernet card for which this software is freely available.

Every Ethernet card does have a pre-programmed ROM (some may use EEPROM)
with the unique MAC address in it...
 
> 
> As for producing a duplicate card, you don't need a license.

Sorry, the license I was refering to was the Viewlogic license...;-)

> However, one can have >1 NIC under Windoze-NT4. Obviously, the one
> with the duplicated address would remain unconnected. But I have no
> idea which of the two NICs the Xilinx s/w will interrogate.

It would be Ethernet that would freak out at having two MAC addresses the
same, not the Xilinx/Viewlogic software....

> >It isn't very likely this will lead to wide spread piracy in the
> >corporate/professional environment.
> 
> Quite. Xilinx software is already dongled by something very hard to
> duplicate: a Xilinx FPGA :)
> 
> My copy of M1.4 is locked to the C: drive serial number. This is easy
> to edit if required, and I am reasonably happy with that.

Understood.  I believe it was Viewlogic we were talking about here...though
the original conversation was about Xilinx...

Austin

Article: 9818
Subject: Re: XactStep6 - The cure for a dongle
From: z80@ds2.com (Peter)
Date: Tue, 07 Apr 1998 15:06:16 GMT
Links: << >>  << T >>  << A >>

>> However, one can have >1 NIC under Windoze-NT4. Obviously, the one
>> with the duplicated address would remain unconnected. But I have no
>> idea which of the two NICs the Xilinx s/w will interrogate.
>
>It would be Ethernet that would freak out at having two MAC addresses the
>same, not the Xilinx/Viewlogic software....

My hypothesis is that you have two NICs in the PC. One is unhacked,
and is connected to your LAN as normal. The other one has the hacked
address, and because this address is potentially identical to another
NIC on the LAN, its BNC/RJ45/etc connector has no connection to it;
also, NT is set-up to not use it for anything.

What I don't know is which of the two NICs the application (which uses
the MAC as the dongle) would interrogate. It is quite possible that
the developer never considered the possibility of >1 NIC. Some people
are amazingly narrow-minded. Remember Viewlogic 4, which cannot print
to a normal printer on LPT1, because its developer (not exactly a
one-man band) only **ever** printed to a network printer??

Certainly, there are legitimate cases for having >1 NIC in a machine.
Lots of people have this, apparently, especially on a machine used as
a server.

Years ago, there was talk of every PC having a unique serial number.
This would have permitted software to be locked to a particular PC.
With smartcards, this could have been made very tamper-proof. This
never took off, presumably because hardware vendors have no vested
interest whatsoever in copy protecting software; in fact, quite the
opposite. 

It would also have been the same stupid idea as dongles, locking a
program (which one day will no longer be supported) to a piece of
hardware (which one day will break). I cannot see any fundamental way
around this IF we insist (rightly, IMO) on the right to use a
particular program without a time limit.


Peter.

Return address is invalid to help stop junk mail.
E-mail replies to zX80@digiYserve.com but
remove the X and the Y.
Article: 9819
Subject: Xilinx Foundation Express
From: Rick Filipkewicz <rick@xxxxz.co.uk>
Date: Tue, 07 Apr 1998 19:22:26 +0100
Links: << >>  << T >>  << A >>
I've just got my M1.4 update for the Foundation tools which comes with a
version of Synopsys FPGA Express VHDL/Verilog. Trying a design which
already compiled with the old [Metamor] XVDHL compiler I've found a
number of VHDL constructs that Metamor considers legal but Synopsys
throws out. Anybody else had this problem ? Also

o Is there any way of avoiding yet another useless GUI and running the
Express tools as just a batch compiler ? All I want to do is produce
an (optimised) XNF netlist. All the device type & timing specification
I can do later via the (nicely documented) Foundation NGDBUILD, MAP &
PAR tools.

o Express seems to litter the design database with what I assume are
configuration and report files in user-hostile binary format instead
of ASCII text. Is there any way to decrypt these ?

_________________________________________________________________________

 Dr. Richard Filipkiewicz 	phone: +44 171 700 3301
 Algorithmics Ltd.		fax: +44 171 700 3400
 3 Drayton Park			email: rick@algor.co.uk
 London N5 1NU
 England
Article: 9820
Subject: Re: Xilinx routing optimization?
From: janovetz@ews.uiuc.edu (Jacob W Janovetz)
Date: 7 Apr 1998 18:29:43 GMT
Links: << >>  << T >>  << A >>
peterc <peterc@hmgcc.gov.uk> writes:


>Generally, it will _always_ be best to use the buffers for the most
>relevant signals, usually the system clock(s). Using the global clock
>nets will help the tools to route the design better.

>Have you added appropriate timespecs to all the signals? If you
>constrain the timing of all signals then the ones that you require to
>have short delays will be routed to meet that delay, while the ones that
>you can tolerate being slower will possibly be routed with longer
>delays. If you don't specify any timing constraint then the tools assume
>every signal is of the same priority, not necessarily routing the
>important signals carefully.

This is what I was asking how to do.



>Is your circuit syncronous? If not could it be made so, meaning that the
>delays become unimportant?

Yes, it is synchronous.  Unfortunately, a wide disparity between
delays of signals of the same bus can cause problems.  Especially
when the delays are on the order of the clock period.

    Cheers,
    Jake

--
   janovetz@uiuc.edu    | Once you have flown, you will walk the earth with
 University of Illinois | your eyes turned skyward, for there you have been,
                        | there you long to return.     -- da Vinci
        PP-ASEL         | http://www.ews.uiuc.edu/~janovetz/index.html
Article: 9821
Subject: Re: Effects of IC production
From: staylor@dspsystems.com
Date: Tue, 07 Apr 1998 12:51:58 -0600
Links: << >>  << T >>  << A >>
Eric,

ICs are responsible for the electronic era. Have you ever heard of football
widows? Have you ever tried to talk to someone who keeps getting phone calls.
Do children play catch or nintendo? Do people read books or watch TV? TV news
has caused many people to believe anything they are told rather than to think
about it or question the accuracy or validity.

The problem is not the disadvantages, but which ones to leave out.

In article <35294BF0.38E6@chat.carleton.ca>,
  Eric Lussier <elussier@chat.carleton.ca> wrote:
>
> I'm a third Computer Systems engineering student and I have to write a
> paper about the positive and negative effects of ICs on humanity. I'm
> thinking the only negative effect would be the environmental issues in
> producing chips. Unfortunetely it's not that easy to find books or
> websites that contain detailed info about this subject. Could someone
> please reffer me to a site or some books that may be able to help me
> out.
>
> Thanks in advance for any help that can be given.
>
> struggling student,
> Eric Lussier
>
> elussier@chat.carleton.ca
>


-----== Posted via Deja News, The Leader in Internet Discussion ==-----
http://www.dejanews.com/   Now offering spam-free web-based newsreading
Article: 9822
Subject: Re: Xilinx routing optimization?
From: Peter Alfke <peter.alfke@xilinx.com>
Date: Tue, 07 Apr 1998 14:12:42 -0700
Links: << >>  << T >>  << A >>
Jacob W Janovetz wrote:

>  Unfortunately, a wide disparity between
> delays of signals of the same bus can cause problems.  Especially
> when the delays are on the order of the clock period.

Fight like hell to avoid that problem, since it is a recipe for
disaster.Intelligent timespecs should get you out of it.
Otherwise get a faster device.

Peter Alfke, Xilinx Applications

>  

Article: 9823
Subject: Re: XactStep6 - The cure for a dongle
From: "Austin Franklin" <darkroo8m@ix.netcom.com>
Date: 8 Apr 1998 00:09:04 GMT
Links: << >>  << T >>  << A >>
> What I don't know is which of the two NICs the application (which uses
> the MAC as the dongle) would interrogate.

It should interrogate all of them, as it is legal to have multiple NICs in
a PC.  I happen to use a quad 10/100 NIC as a bridge/router in my network.

> Remember Viewlogic 4, which cannot print
> to a normal printer on LPT1, because its developer (not exactly a
> one-man band) only **ever** printed to a network printer??

Huh?  I used Viewlogic 4 for years, and some times still do...I can print
just fine to my post script laser printer...also that ran under DOS, and
DOS wasn't exactly a networked OS...so I don't understand what you are
referring to here...

> Years ago, there was talk of every PC having a unique serial number.

I believe the best option...and it should be done by Dallas as part of the
RTC RAM...

> IF we insist (rightly, IMO) on the right to use a
> particular program without a time limit.

I believe the law is on our side, if the issue is pressed.  Since when you
buy it, you do not agree that you will only use it for a certain period of
time, if you took the vendor to court ($$$$) they would either have to
refund your money or give you a license that you could use in perpetuity. 
All is needed is one precedent case that declares it illegal to time limit
an owner, unless s/he agrees to the time limit up front.  I believe the big
EDA companies will, undoubtedly, push for yearly 'leases' instead of
purchases, and unfortunately, the idiot business people who make most of
the purchasing decisions for large companies who use the EDA tools will
just dumbly go along with it...sigh.  Like I previously voiced, most of the
big EDA vendors are arrogant and greedy.  That opinion hasn't changed in
the past few days.

Austin

Article: 9824
Subject: Re: Effects of IC production
From: tcoonan@mindspring.com (Thomas A. Coonan)
Date: Wed, 08 Apr 1998 01:20:38 GMT
Links: << >>  << T >>  << A >>
But seriously.. ("Now why would you want to do a silly thing
like that..")  A book by Sze (something like "VLSI Fabrication"..)
covers the technical aspects of fabrication; it would at least tell
you about which toxics are involved (Siline, Cynide, etc..).  I think
they have some tables you might find useful..
>Joseph H Allen <jhallen@world.std.com> wrote in article
><Er174n.Hq@world.std.com>...
>: In article <35299fcd.2009650@news.megsinet.net>,  <msimon@tefbbs.com>
>wrote:
>: 
>: >You might try reading '1984' by George Orwell. 
>: 
>: No no, take a look at 'Star Trek' by Gene Rodenbury.
>
>no, no, no!!!!!!  terminator series with arnold (although i'm a fan of the
>above 2). arnold kicked their butts in the movie versions.
>



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