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Messages from 103700

Article: 103700
Subject: Re: Incrmental Compilation in Quartus 5.1
From: pantxoa <nospam@nospam.com>
Date: Thu, 08 Jun 2006 22:27:46 +0200
Links: << >>  << T >>  << A >>
Hi,

Beware of the fact that the Quartus Incremental compilation seems to be 
not compliant with some IP and the Signal Tap feature.

Regards.

Shawn Malhotra a écrit :
> Hi Joe,
> 
> You can certainly use Quartus II Incremental Compilation after
> assigning the pins in your design to physical locations on the device.
> Incremental compilation should help your co-worker preserve the
> unchanged parts of his design, including the pin locations, as he adds
> updated modules.  He should also save compilation time during this
> process as well.  For more information on Quartus II Incremental
> Compilation you can visit the following links:
> 
> Quartus II Incremental Compilation Website (Provides an overview of the
> feature and links to more information):
> 
> http://www.altera.com/products/software/products/quartus2/design/qts-incremental.html
> 
> Quartus II Handbook Volume 1, Chapter 1 (Provides a thorough
> description of the feature and how to use it):
> 
> http://www.altera.com/literature/hb/qts/qts_qii51015.pdf
> 
> Hopefully this provides all the information your co-worker needs to use
> incremental compilation for his design, good luck!
> 
> Regards,
> 
> Shawn Malhotra
> Altera Corp.
> 
> jjlindula@hotmail.com wrote:
>> Hello, my co-worker has a very large Altera Quartus 5.1 design that
>> takes about 45 minutes to compile. The project has already had the pins
>> physically assigned and he is still adding things to the project such
>> as updated modules. I mentioned to him that trying Incremental
>> Compilation (IC) might decrease compilation time. He asked if you could
>> do IC after the I/O pin symbols have been physically assigned to pins?
>> I'm not an expert on IC so I hope someone can help.
>>
>> Thanks,
>> joe
> 


-- 
Répondez moi en privé en cliquant sur ce lien :
http://www.cerbermail.com/?MtHmcRTm5M

Article: 103701
Subject: Re: stable, tested 6502 core
From: "MikeJ" <mikej@fpgaarcade.nospam.com>
Date: Thu, 08 Jun 2006 21:36:27 GMT
Links: << >>  << T >>  << A >>
see previous post
www.fpgaarcade.com

The 6502 core there is not bad - it is cycle and operation accurate for most 
stuff -and it's free.


/Mikej
<aiiadict@gmail.com> wrote in message 
news:1149791229.807230.282480@j55g2000cwa.googlegroups.com...
> I'm looking for a stable, tested 6502 core
>
> does one exist?
>
> I'm looking for freebies or
> pay-to-gets
>
> Rich
> 



Article: 103702
Subject: Re: stable, tested 6502 core
From: pbdelete@spamnuke.ludd.luthdelete.se.invalid
Date: 08 Jun 2006 22:13:03 GMT
Links: << >>  << T >>  << A >>
aiiadict@gmail.com wrote:
>I'm looking for a stable, tested 6502 core

>does one exist?

>I'm looking for freebies or
>pay-to-gets

This unit for sure contains a 6502 hdl core:      (by Jeri_Ellsworth)
  http://en.wikipedia.org/wiki/C64_Direct-to-TV

Same girl, another product:
  http://c64upgra.de/c-one/

She proberbly have a 6502 core somewhere.

Here's another:
  http://www.opencores.org/projects.cgi/web/t65/overview

Try 6520 vhdl in google..


Article: 103703
Subject: Re: stable, tested 6502 core
From: aiiadict@gmail.com
Date: 8 Jun 2006 15:28:52 -0700
Links: << >>  << T >>  << A >>
> Try 6520 vhdl in google..


I have googled and found many broken, inaccurate cores.

R


Article: 103704
Subject: Re: stable, tested 6502 core
From: jaxato@gmail.com
Date: 8 Jun 2006 16:40:19 -0700
Links: << >>  << T >>  << A >>
Hi,

Both the T65 from Opencores and Free6502 from the Free-Ip Project (its
been a while that the guy took it offline, but you can still get it
from fpgaarcade) are stable and rather small in terms of logic
resources (30% of xc3s200). We have used them in a good five projects.
Each one has their own pros and cons. The T65 has a well defined
synchronous interface but tries to mimic the real 6502, signals are
inverted and so on. The free6502 on the other hand, has a good
interface too but lacks a ready input signal. For people that wants to
run it at maximum speed (around 40 MHZ, 10 mips), its tricky to make it
go into wait states (to handle slower peripherals like an RTL8019AS
chip), while the T65 has that mechanism and will allow itself to be
idle...

In all, both are very usable and well-defined soft processors suitable
for FPGA implementation.

Jacques

www.design4fpga.com

aiiadict@gmail.com wrote:
> > Try 6520 vhdl in google..
> 
> 
> I have googled and found many broken, inaccurate cores.
> 
> R


Article: 103705
Subject: Re: stable, tested 6502 core
From: "Kryten" <kryten_droid_obfusticator@ntlworld.com>
Date: Thu, 08 Jun 2006 23:49:59 GMT
Links: << >>  << T >>  << A >>
<aiiadict@gmail.com> wrote in message 
news:1149791229.807230.282480@j55g2000cwa.googlegroups.com...
> I'm looking for a stable, tested 6502 core

Daniel Wallner's 6502 core at opencores.org

I concur with your findings.

As my first boss used to say, starting projects is easy - finishing them is 
not.

If you have a project like building a vintage car or aeroplane, other people 
are only impressed when you can turn the key and take off. Or if they can 
see you making good progress in the project. If it is started briskly then 
left for ages, then chances are you got stuck and don't have the skills to 
complete it.

Likewise with reproductions of old CPU cores. We can all start one, but 
until it is fully working it is nothing to brag about.

In contrast, Daniel does seem to see the job through. So much so that I 
notice places that used to sell Z80 and 6502 cores as IP no longer bother.

I would like to use his CPU designs in my own projects, but mine now use 
more of my FPGA than his CPU designs do. So for now I just stick with 
external (and still cheap and readily available) CPU chips.








Article: 103706
Subject: Good free or paid merge software that edits two similar files?
From: "Weng Tianxiang" <wtxwtx@gmail.com>
Date: 8 Jun 2006 18:42:57 -0700
Links: << >>  << T >>  << A >>
Hi,
Recently I am asked to update several my projects. A lot of works has
to be made, comparing old code and new code and replace old one with
new one.

I found that WinMerge is of great value in this respect. I would like
to thank those people who developed the free software to let me use it
and dramatically to increase my job efficiency and reliability.

Thank you, WinMerge software designer.

I wonder if there is better merge software better than WinMerge, free
or paid?

If you know, please let me know.

Weng


Article: 103707
Subject: Re: Good free or paid merge software that edits two similar files?
From: "Markus Svilans" <msvilans@gmail.com>
Date: 8 Jun 2006 20:21:50 -0700
Links: << >>  << T >>  << A >>

Weng Tianxiang wrote:
> Hi,
> Recently I am asked to update several my projects. A lot of works has
> to be made, comparing old code and new code and replace old one with
> new one.
>
> I found that WinMerge is of great value in this respect. I would like
> to thank those people who developed the free software to let me use it
> and dramatically to increase my job efficiency and reliability.
>
> Thank you, WinMerge software designer.
>
> I wonder if there is better merge software better than WinMerge, free
> or paid?
>
> If you know, please let me know.
>
> Weng

The merge tool that comes with TortoiseSVN is quite useful. It can show
the old and new files side by side, and colour highlight any
differences (changed lines, deleted lines, new lines, etc.). I have
found it very useful in the past.

http://tortoisesvn.tigris.org/

Regards,
Markus.


Article: 103708
Subject: Re: Good free or paid merge software that edits two similar files?
From: "Weng Tianxiang" <wtxwtx@gmail.com>
Date: 8 Jun 2006 20:48:56 -0700
Links: << >>  << T >>  << A >>
Hi Markus,
Thank you. I will try to use the tool and compare which one is better.

Weng

Markus Svilans wrote:
> Weng Tianxiang wrote:
> > Hi,
> > Recently I am asked to update several my projects. A lot of works has
> > to be made, comparing old code and new code and replace old one with
> > new one.
> >
> > I found that WinMerge is of great value in this respect. I would like
> > to thank those people who developed the free software to let me use it
> > and dramatically to increase my job efficiency and reliability.
> >
> > Thank you, WinMerge software designer.
> >
> > I wonder if there is better merge software better than WinMerge, free
> > or paid?
> >
> > If you know, please let me know.
> >
> > Weng
>
> The merge tool that comes with TortoiseSVN is quite useful. It can show
> the old and new files side by side, and colour highlight any
> differences (changed lines, deleted lines, new lines, etc.). I have
> found it very useful in the past.
> 
> http://tortoisesvn.tigris.org/
> 
> Regards,
> Markus.


Article: 103709
Subject: Re: (Stupid/Newbie) Question on UART
From: mk <kal*@dspia.*comdelete>
Date: Fri, 09 Jun 2006 05:30:06 GMT
Links: << >>  << T >>  << A >>
On Fri, 09 Jun 2006 04:54:30 GMT, "Maxim S. Shatskih"
<maxim@storagecraft.com> wrote:

>> Actually with 10mb/s Ethernet and USB (all speeds) there is no carrier
>> on the wire when actual data is not begin transmitted.
>
>Same as with serial UART.
>
>>Clock recovery
>> starts at an arbitraty point with every packet.
>
>USB packets have a preamble to synchronize the PLLs. IIRC Ethernet too.

There are no clock-recovery PLLs in USB. FS/LS is specifically
designed to be implemented by a 4x DLL. One can implement 10BT without
a PLL too.

Article: 103710
Subject: Re: Good free or paid merge software that edits two similar files?
From: grigsoft@gmail.com
Date: 8 Jun 2006 22:48:25 -0700
Links: << >>  << T >>  << A >>
You can also check my Compare It! from http://www.grigsoft.com/.

Igor Green
http://www.grigsoft.com/
Compare It! + Synchronize It! - files and folders comparison never was
easier!


Article: 103711
Subject: The 3rd International Electronics Design Contest for Students
From: jamil.khatib@googlemail.com
Date: 9 Jun 2006 00:40:18 -0700
Links: << >>  << T >>  << A >>
IEDCS.handasarabia.org

The 3rd International Electronics Design Contest for Students
IEDCS'06
I=2E	OBJECTIVES
=B7	Innovation Promotion
=B7	Technical Knowledge Sharing
=B7	Talents Exploration
=B7	Academia and Industry Bridging
II.	JOINING CRITERIA
=B7	Innovative and applicable projects
=B7	Designed by full-time undergraduate students
=B7	Academic Year, Fall 2005/Spring 2006
=B7	International submissions are invited
III.	AWARDS
First Three ranked designs awards:
=B7	Paper at IEEE ICM'06 Proceedings
=B7	Presentation at IEEE ICM'06
=B7	Waiving ICM'06 registration fees
=B7	"OpenTech" EDA tools and designs per winning
project
=B7	Have a chance to host their projects under Handasa Arabia as open
source projects
IV.	DESIGNS' SCOPE
Conceptual and Operational designs for:
=B7	Digital/Analogue Integrated Circuits
=B7	FPGA based designs, SOC
=B7	Computer Architectures/ Processors
=B7	Reconfigurable Computing Systems
=B7	Embedded Systems, MEMS/Optics/Bio-Chips
=B7	Control Systems, Telecommunications Systems.
=B7	DSP Applications, Systems Software Modelling.
=B7	Measurements and Instrumentation Systems.
=B7	Design Methodologies/Verification Techniques.

V=2E	DESIGN SUBMISSION
=B7	Summary is in IEEE journal two-column format
=B7	Summary doesn't exceed four pages
=B7	Submit summary in PDF format by email
=B7	Submission language is English
=B7	Submission dead line is August 15, 2006
=B7	Send design to: iedcs@handasarabia.org
VI.	JUDGING
International judging panel from academia, industry plus the IEEE
ICM'06 committee.
Judging Criteria
=B7	Originality
=B7	Soundness of Engineering
=B7	Documentation Quality and Clarity
=B7	Performance
=B7	Judging decision by: September 1 , 2006

In Cooperation with the 18th IEEE International Conference on
Microelectronics, ICM 2006,
December 2006, Saudi Arabia

Aljazeera.net News Story about IEDCS'05
May, 9 2005
http://www.aljazeera.net/NR/exeres/4EFC2697-DCBF-4959-BD2E-6F4B693EC1B6.htm
EEtimes & EEdesign News Story about IEDCS'04
August, 04 2004
www.eedesign.com/article/printableArticle.jhtml?articleID=3D26805904
VII.	ORGANIZERS
Handasa Arabia Organization
www.handasarabia.org
The University of Waterloo
www.uwaterloo.ca
IEEE ICM'06 Conference
http://icm2006.kfupm.edu.sa/


Article: 103712
Subject: Re: FPGA board for USB experiments?
From: Dave Farrance <DaveFarrance@OMiTTHiSyahooANDTHiS.co.uk>
Date: Fri, 09 Jun 2006 08:31:36 GMT
Links: << >>  << T >>  << A >>
"John Adair"  wrote:

>Have a look at this module 
>http://www.enterpoint.co.uk/moelbryn/modules/usb_ps2.html in conjunction 
>with our Raggedstone1 product. Basically the module is a voltage limiter(bus 
>switch) on the USB lines leaving the logic to be implemented in the FPGA.

Thanks to everybody that helped me in this thread. I've decided to buy
the above product.

-- 
Dave Farrance

Article: 103713
Subject: Re: Good free or paid merge software that edits two similar files?
From: "filox" <filox_realmmakniovo@yahoo.com>
Date: Fri, 9 Jun 2006 10:58:12 +0200
Links: << >>  << T >>  << A >>
ExamDiff - it's free,  but only does comparison between two files

-- 
You're never too young to have a Vietnam flashback
"Weng Tianxiang" <wtxwtx@gmail.com> wrote in message 
news:1149817377.330704.320240@j55g2000cwa.googlegroups.com...
> Hi,
> Recently I am asked to update several my projects. A lot of works has
> to be made, comparing old code and new code and replace old one with
> new one.
>
> I found that WinMerge is of great value in this respect. I would like
> to thank those people who developed the free software to let me use it
> and dramatically to increase my job efficiency and reliability.
>
> Thank you, WinMerge software designer.
>
> I wonder if there is better merge software better than WinMerge, free
> or paid?
>
> If you know, please let me know.
>
> Weng
> 



Article: 103714
Subject: Re: Good free or paid merge software that edits two similar files?
From: "colin" <colin_toogood@yahoo.com>
Date: 9 Jun 2006 02:26:38 -0700
Links: << >>  << T >>  << A >>
I thought that all apps like this tried to be better than araxis,
allthough I also use minmerge at home.

Colin

Weng Tianxiang wrote:
> Hi,
> Recently I am asked to update several my projects. A lot of works has
> to be made, comparing old code and new code and replace old one with
> new one.
>
> I found that WinMerge is of great value in this respect. I would like
> to thank those people who developed the free software to let me use it
> and dramatically to increase my job efficiency and reliability.
>
> Thank you, WinMerge software designer.
>
> I wonder if there is better merge software better than WinMerge, free
> or paid?
> 
> If you know, please let me know.
> 
> Weng


Article: 103715
Subject: Linux 2.6 for PPC on Xilinx XUP-V2PRO board!
From: "Ams" <ammubhai@gmail.com>
Date: 9 Jun 2006 02:37:34 -0700
Links: << >>  << T >>  << A >>
Hello,
   After spending sometime hunting on the web... there is very little
information if nothing at all on compiling a 2.6 linux kernel for the
XUP-V2PRO or the ML3XX variants. I am currently trying to compile 2.6
for my XUP-V2PRO with the following requirements:

1. Ethernet support,
2. Graphics support,
3. PS/2 Keyb and mouse support,
4. Serial support,
5. Audio support,

With the BSP generated by the Xilinx EDK, I could get 2.4 linux working
with only (1) and (4) above. There have been several changes in 2.6
which makes the xilinx linux device drivers incompatible. Please can
anyone who knows about this issue or has got linux 2.6 running help me
out?

Thanks in advance!
-Ameet


Article: 103716
Subject: Re: Good free or paid merge software that edits two similar files?
From: charles.elias@wpafb.af.mil
Date: 9 Jun 2006 02:48:53 -0700
Links: << >>  << T >>  << A >>

Weng Tianxiang wrote:
> Hi,
> Recently I am asked to update several my projects. A lot of works has
> to be made, comparing old code and new code and replace old one with
> new one.
>
> I found that WinMerge is of great value in this respect. I would like
> to thank those people who developed the free software to let me use it
> and dramatically to increase my job efficiency and reliability.
>
> Thank you, WinMerge software designer.
>
> I wonder if there is better merge software better than WinMerge, free
> or paid?
>
> If you know, please let me know.
>
> Weng

I use MultiEdit (not free) for this purpose and it is excellent.  It is
a highly customisable text editor that I used extensively for my VHDL
projects.

Charles


Article: 103717
Subject: Re: Good free or paid merge software that edits two similar files?
From: David R Brooks <davebXXX@iinet.net.au>
Date: Fri, 09 Jun 2006 01:48:56 -0800
Links: << >>  << T >>  << A >>
Weng Tianxiang wrote:
> Hi,
> Recently I am asked to update several my projects. A lot of works has
> to be made, comparing old code and new code and replace old one with
> new one.
> 
> I found that WinMerge is of great value in this respect. I would like
> to thank those people who developed the free software to let me use it
> and dramatically to increase my job efficiency and reliability.
> 
> Thank you, WinMerge software designer.
> 
> I wonder if there is better merge software better than WinMerge, free
> or paid?
> 
> If you know, please let me know.
> 
I use Beyond Compare. It's not free, though.

Article: 103718
Subject: Re: Good free or paid merge software that edits two similar files?
From: "Nial Stewart" <nial@nialstewartdevelopments.co.uk>
Date: Fri, 9 Jun 2006 10:56:20 +0100
Links: << >>  << T >>  << A >>
I have found Beyond Compare to be beyond comparison :-)

It'll let you do a diff on directories, then drill down into the
directories to see which files have changed. You can then do
a diff on the files where it highlights the the differences in
lines allowing you to jump to the next diff and copy the changes
from one file to the other. It's the best manual merge tool I've
used (although I haven't used many).

When highlighting the differences (in files and directories)
there are filters you can set up to ignore unimportant differences
(white space, empty lines etc), show only the differences etc.

You can also select the two files or directories to be compared
in windows explorer with a left mouse click to launch a comparison.

You can set up different 'sessions' of file or directory comparison
so when you launch it you can quickly select and run a comparison.
If you do a directory comaprison you can select to update one
to the other with one button, this lets you do a quick uncremental
backup of recent changes to a remote server/directory.


It's one of those utilities that would stop me moving to Linux.



Nial. 



Article: 103719
Subject: Re: Good free or paid merge software that edits two similar files?
From: Marcus Harnisch <marcus.harnisch@gmx.net>
Date: Fri, 09 Jun 2006 12:57:57 +0200
Links: << >>  << T >>  << A >>
Weng,

I guess nobody has mentioned (X)Emacs+Ediff yet. It makes only sense
with text-based files of course.

One highlight worth mentioning is the ability to take full advantage
of the editing capabilities and syntax highlighting (as well as email,
news-reading, doctor...) of (X)Emacs.

-- Marcus

Article: 103720
Subject: Re: Good free or paid merge software that edits two similar files?
From: dalai lamah <antonio12358@hotmail.com>
Date: Fri, 09 Jun 2006 11:01:26 GMT
Links: << >>  << T >>  << A >>
Un bel giorno Weng Tianxiang digitò:

> I wonder if there is better merge software better than WinMerge, free
> or paid?

The best I've ever tried is Araxis Merge (definitely not free).

-- 
asd

Article: 103721
Subject: Re: Efficient implementation of Address Decoding logic
From: "Andy" <jonesandy@comcast.net>
Date: 9 Jun 2006 05:37:04 -0700
Links: << >>  << T >>  << A >>
Just google terms like "asynchronous" "synchronize" "metastable", etc.
from this and the comp.lang.vhdl and comp.lang.verilog groups.

Andy


Srikanth BJ wrote:
> Andy wrote:
> > If you use "falling_edge(awe)" then awe will get tied to the clock
> > input on one or more registers that will hold the signal values that
> > you assign within that if-then clause.
> >
> > Storing data on falling edges of strobes will work, but think about
> > what you are going to do with that data in the latches. The timing can
> > be very difficult to manage if you need to use that data elsewhere in a
> > synchronous (clocked) system. Handling asynchronous buses in a
> > synchronous system is beyond the scope of this conversation. Whole
> > chapters/books have been written on it. Generally speaking, you usually
> > end up syncrhonizing the control lines, and using those synchronized
> > versions to control storage into synchronous registers (i.e. they form
> > clock enables on registers that are clocked by your system clock). If
> > your clock is not fast enough to handle the timing of the controls,
> > then you may need to latch the data with the asynchronous strobe, then
> > use a synchronized version of the strobe to enable transfer from the
> > latch into a register on the system clock.
> >
> Andy., got to know many things from you. I havenot worked too much on
> handling
> asynchronous events., i think its probably very challenging and i guess
> one should be fully equipped with the basics involved. If you could
> suggest any book/links which might be very helpful to go further in to
> the above discussed  topics, it  would be really appreciated.
> Thanks in advance,
> Srikanth


Article: 103722
Subject: PCI Express - Root Complex ?
From: "Jerome" <jerome_l_horowitz@yahoo.com>
Date: 9 Jun 2006 05:42:19 -0700
Links: << >>  << T >>  << A >>
Looking to use some Xilinx V4FX or Altera Stratix GXparts for designing
several endpoints  using PCI Express for the 1st time. I dont have the
PCI-Express spec  yet but am wondering whether I need a root complex?

My understanding is that root complex differs from endpoint in that it
is used
for interfacing to main CPU memory.
However if I only want to communicate  between various FPGA endpoints
(using a switch) do I really need a root complex IP bridge? Seems like
all IP cores
are endpoints only?

Any Xilinx or Altera PCI Express IP core recommendations based on
experience?

Thanks!


Article: 103723
Subject: Re: PCI Express - Root Complex ?
From: "Sylvain Munaut <SomeOne@SomeDomain.com>" <246tnt@gmail.com>
Date: 9 Jun 2006 05:52:13 -0700
Links: << >>  << T >>  << A >>
> Looking to use some Xilinx V4FX or Altera Stratix GXparts for designing
> several endpoints  using PCI Express for the 1st time. I dont have the
> PCI-Express spec  yet but am wondering whether I need a root complex?
>
> My understanding is that root complex differs from endpoint in that it
> is used
> for interfacing to main CPU memory.
> However if I only want to communicate  between various FPGA endpoints
> (using a switch) do I really need a root complex IP bridge? Seems like
> all IP cores
> are endpoints only?
>
> Any Xilinx or Altera PCI Express IP core recommendations based on
> experience?

I would guess it's more or less like PCI and you need someone to
enumerate the busses and assign address.


Sylvain


Article: 103724
Subject: Re: ppc instruction count
From: eascheiber@yahoo.com
Date: 9 Jun 2006 07:03:34 -0700
Links: << >>  << T >>  << A >>
Thanks for the great solution,

just one question, in xtime_l.c XTime_GetTime function shouldn't use
mftb instead of mfspr. It does not seem to work ok /w mfspr.

Bye.


Siva Velusamy wrote:
> eascheiber@yahoo.com wrote:
> > Hi,
> >
> > Can anyone tell me how I can count the number of instructions or cycles
> > needed for a particular piece of code? Other than stepping over in the
> > debugger :)
> >
> > Thanks,
> > e.
> >
>
> To count the number of cycles, use the time stamp counter present in the
> PPC. If you are using Xilinx EDK, you can use XTime_GetTime() routines
> to access the TSC..or you can always write assembly code.
> 
> /Siva




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