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Messages from 32250

Article: 32250
Subject: Help with VHDL
From: wil@informate.be (Jean Williams)
Date: 21 Jun 2001 05:53:10 -0700
Links: << >>  << T >>  << A >>
We are an OO software house based in Brussels, Belgium, Europe.

For a semicon based project we are undertaking here in Belgium we
currently have need someone with skills we do not possess.

We currently looking for an experienced VHDL designer with experience
of Synopsis/Ambit or similar. The work is targeted at eventual IC/FPGA
implementation.
The work would be for at least 12 months.

Because of the nature of the work we can only accept EU nationals for
this project.

If this is you can you urgently email or fax us 
     - your CV
     - Availability
     - Daily Rate 
by either of the following means.

Email : wil@informate.be
Fax : [32 for Belgium]-2-7122051

Many thanks,


Jean Williams,
Informate International Ltd.

Article: 32251
Subject: Re: Pin locking in Maxplus2
From: Ray Andraka <ray@andraka.com>
Date: Thu, 21 Jun 2001 13:51:54 GMT
Links: << >>  << T >>  << A >>
I was asking for the same reason.  I use NT4 because it is stable and reasonably
secure.  I'd like to be able to use USB especially. The user interface is very
windows95-like and I haven't had any problems running win95 stuff under NT...except
for those applications that need unsupported hardware such as the USB, and the modem
extensions that link caller ID into the system.  I tried win2k briefly last year
when I upgraded systems but found the likes of xilinx, synplicity and modelsim
didn't fare too well.



Nial Stewart wrote:

> Ray Andraka wrote:
> >
> > NT4.0 pretty much has all the 'niceties' of win95.  Are you running any of the
> > CAE tools under w2000?  If so, which ones, and are they stable too?
>
> Ray,
>
> As far as I know NT 4.0 still can't drive USB devices which is why
> I was wondering about win2K. If it's as stable as NT with the
> hardware drivers of win 98/95 then it sounds a good bet.
>
> Nial.

--
-Ray Andraka, P.E.
President, the Andraka Consulting Group, Inc.
401/884-7930     Fax 401/884-7950
email ray@andraka.com
http://www.andraka.com



Article: 32252
Subject: Searching any 144 pin SO-DIMM module
From: Laurent Gauch <laurent.gauch@amontec.com>
Date: Thu, 21 Jun 2001 15:54:26 +0200
Links: << >>  << T >>  << A >>
Dear all,

I'm searching any board in 144 pin SO-DIMM format:
--> flash module
--> ram module
--> fpga module
--> dsp module
--> MCU / MPU module
--> ethernet module
--> ...
--> any module in 144 pin SO-DIMM format.

Thank you for giving me the references of the modules you know.
(Please send me a email to laurent.gauch@amontec.com)


Reagards
Laurent
www.amontec.com


Article: 32253
Subject: Re: FFT limited size input
From: Ray Andraka <ray@andraka.com>
Date: Thu, 21 Jun 2001 14:00:46 GMT
Links: << >>  << T >>  << A >>
The 16 bit FFT is a kernel that can be used for larger (powers of 16)
FFTs.  If you look at the FFT, it can be decomposed into smaller FFTs
using the mixed radix algorithm.  The decomposition consists of a data
reordering and a phase rotation of the intermediate results.  We currently
are one of the vendors offering a shrink-wrapped 16 point core.  We have
used that core for some very high speed 256 point and 4K point FFTs.  For
those, the block RAM speed is the limiting factor.  Our 16 point core is
more compact and faster than our competitor's cores because we do not use
radix 4 kernels to construct the core.

We do have a phase rotator and reordering address generators available
too, but they are not in state for general sale yet.

finish wrote:

> hello,
>
> From my modest background, i know that for performing the FFT
> transform on an input signal, i have to extend it, if required, by
> zeros to 2^n.
> FFT is a global transform,i.e the whole input sequence should be
> available.
>
> In practise, most often we take 1024 or 512, but i see some commercial
> hardware implementation for just 16 input data.
>
> How far will this limited input size transform affect the overall
> performance ?
>
> thanks
>
> H.S

--
-Ray Andraka, P.E.
President, the Andraka Consulting Group, Inc.
401/884-7930     Fax 401/884-7950
email ray@andraka.com
http://www.andraka.com



Article: 32254
Subject: Re: Xilinx Software free
From: Ray Andraka <ray@andraka.com>
Date: Thu, 21 Jun 2001 14:19:47 GMT
Links: << >>  << T >>  << A >>
You can compile the smaller devices using the webpack software on-line,
which is free.  For students and small projects this should be sufficient
and will save you the expense of buying a seat.

Antonio wrote:

> I need the latest version of Xilinx Foundation Software, there is some
> way to have it free ?? I'm just a poor student, thank you for your
> answer ...
>
> Antonio D'Ottavio

--
-Ray Andraka, P.E.
President, the Andraka Consulting Group, Inc.
401/884-7930     Fax 401/884-7950
email ray@andraka.com
http://www.andraka.com



Article: 32255
Subject: Trouble with IOB Cells
From: Pascal Merkel <pascal.merkel@stud.uni-karlsruhe.de>
Date: Thu, 21 Jun 2001 16:49:21 +0200
Links: << >>  << T >>  << A >>
Hi all,

I want to examine a sub-module of my design regarding the exact number
of used CLBs in the Xilinx XC4000E-Series. But now some LUTs to invert
signals are not used any more because the internal ports are pads in
this case and so some inversions are done in the IOBs. Therefore I don't
get the correct number of CLBs. Is there a possibility to force the IOBs
not to use the inverted input port or any other solution to get the
right number? I use Xact-M3.1 .

Pascal

Article: 32256
Subject: Re: Pin locking in Maxplus2
From: Nial Stewart <nials@sqf.hp.com>
Date: Thu, 21 Jun 2001 16:00:58 +0100
Links: << >>  << T >>  << A >>
Ray Andraka wrote:
> 
> I was asking for the same reason.  I use NT4 because it is stable and reasonably
> secure.  I'd like to be able to use USB especially. The user interface is very
> windows95-like and I haven't had any problems running win95 stuff under NT...except
> for those applications that need unsupported hardware such as the USB, and the modem
> extensions that link caller ID into the system.  I tried win2k briefly last year
> when I upgraded systems but found the likes of xilinx, synplicity and modelsim
> didn't fare too well.


From what I've read over the last day, that's surprising.
Most people who've tried Win2000 report that it's been
very reliable and would recommend it.

Are you sure you didn't try WinMe which most people seem
to think should be avoided like the plague?


Nial.

Article: 32257
Subject: Re: Xilinx Software free
From: "Vincent Mack" <vincent.mack@epfl.ch>
Date: Thu, 21 Jun 2001 17:11:59 +0200
Links: << >>  << T >>  << A >>

"Antonio" <dottavio@ised.it> wrote in message
news:fb35ea96.0106210439.30a69a6d@posting.google.com...
> I need the latest version of Xilinx Foundation Software, there is some
> way to have it free ?? I'm just a poor student, thank you for your
> answer ...
>
> Antonio D'Ottavio

You can find a list of  free and low cost design software at

    http://www.optimagic.com/lowcost.shtml

otherwise just try the gnutella file sharing network
(http://www.limewire.com)
----------------------------------------------------------------------------
----
Vincent MACK
LSI / DE / EPFL
CH-1015 Lausanne
+41 / (0)21 693 56 88
 vincent.mack@epfl.ch




Article: 32258
Subject: NT vs W2K (WAS Re: Pin locking in Maxplus2)
From: bob elkind <eteam@aracnet.com>
Date: Thu, 21 Jun 2001 08:14:26 -0700
Links: << >>  << T >>  << A >>
Here are five reasons for migrating from NT4 to W2K:

1.  USB
If you use a scanner, or multiplie printers, or a digital camera, or a portable ZIP drive;
USB is a much better connectivity implementation and architecture.

2.  True Plug'n'Play -- NT4SPxx has a sorta OK PnP implementation, but with W2K
it was designed in from the start.  It really does make a difference.

3.  Support for >8GB disks on boot drive.
With NT, support for large drives (>8GB) on the boot drive is conditional...  the boot
files and records must be within the "first 8GB" of the drive.  This makes restoring the
OS (or copyig onto a new and larger drive) a problematic process.  The service packs
add full large drive support, but this happens only after the initial load of the OS.

With W2K, no issues with large drives.  I run with two 60GB drives, and never a
problem.

4.  Support for FAT32 partitions
Do you dual-boot between W98 and NT or W2K?  If so, then you know that the only
way to pass or share files between the two OSs is through a 2GB (max) FAT16 partition.
FAT32 partitions disappear in NT, NTFS partitions dissapear in W98.

With W2K I can install 1 copy of an application, and that will be enough for both
W2K and W98.

5.  W2K system console
This is a new facility for repairing a system impaired by a wayward application to
the point that it won't boot.  It's a lifesaver when under stress.  I've needed it only
twice, once for  a very badly written device driver and once for trying (in vain) to
get Adaptec/Roxio Easy CD Creator to install properly.

There are some other subtle differences between NT and W2K, but these 5 are the
more compelling differences (in my mind).

-- Bob Elkind, fpga design/consulting
www.aracnet.com/~eteam
mail to: eteam@aracnet.com

Ray Andraka wrote:

> I was asking for the same reason.  I use NT4 because it is stable and reasonably
> secure.  I'd like to be able to use USB especially. The user interface is very
> windows95-like and I haven't had any problems running win95 stuff under NT...except
> for those applications that need unsupported hardware such as the USB, and the modem
> extensions that link caller ID into the system.  I tried win2k briefly last year
> when I upgraded systems but found the likes of xilinx, synplicity and modelsim
> didn't fare too well.
>


Article: 32259
Subject: Re: Searching any 144 pin SO-DIMM module
From: "ajd" <ajadu76@hotmail.com>
Date: Thu, 21 Jun 2001 16:15:40 +0100
Links: << >>  << T >>  << A >>

Try www.nmi.co.uk/uengine.htm .

andrew.

"Laurent Gauch" <laurent.gauch@amontec.com> wrote in message
news:3B31FC92.2070409@amontec.com...
> Dear all,
>
> I'm searching any board in 144 pin SO-DIMM format:
> --> flash module
> --> ram module
> --> fpga module
> --> dsp module
> --> MCU / MPU module
> --> ethernet module
> --> ...
> --> any module in 144 pin SO-DIMM format.
>
> Thank you for giving me the references of the modules you know.
> (Please send me a email to laurent.gauch@amontec.com)
>
>
> Reagards
> Laurent
> www.amontec.com
>



Article: 32260
Subject: Re: Two's Complement conversion for FIR coefficients
From: "Kevin Neilson" <kevin_neilson@yahoo.com>
Date: Thu, 21 Jun 2001 15:42:28 GMT
Links: << >>  << T >>  << A >>
0.102546681502  = 102546681502 / 10^12
Let's say we want 11-bit precision, so
102546681502 / 10^12 = x / 2^11
so x (rounded) = .102546681502*2048 = 210 = 0b00011010010
so .102546681502 = 0b0.0001101001 (with 10 bits after the radix point)
Since it's positive, you put the sign bit (zero) on the front for a 12-bit
coefficient of 000001101001

Normally, coefficients are scaled so the magnitude is less than/equal to
one.  That is, a 12-bit coefficient (including sign bit) would represent a
number in the range of -1..(2^11-1)/(2^11).  Remember that having one binary
digit to the left of the radix point in a binary number means your 12-bit
number would have a range of about -2...2.

ScopeFIR is a good program for FIR development and manipulation and scaling
of coefficients.  It's $100.

-Kevin

"Antonio" <dottavio@ised.it> wrote in message
news:fb35ea96.0106210435.738ae496@posting.google.com...
> I've the coefficient 0.102546681502 that I want to translate in
> 2'complement fixed point binary number having 1 bit for the sign, 1
> bit before the point and 10 bit after, what I have to do ?? Is there
> any software to make this automatically also for the opposite
> conversion ???
> Thanks you a lot
>
> Antonio D'Ottavio
>
> Post a follow-up to this
>



Article: 32261
Subject: Re: Two's Complement conversion for FIR coefficients
From: John_H <johnhandwork@mail.com>
Date: Thu, 21 Jun 2001 15:48:09 GMT
Links: << >>  << T >>  << A >>
To get 10 bits after the decimal in fixed binary, multiply the
coefficient by 2^10 and use the rounded integer part.
  0.102546681502 * 2^10 = 105.007801858048
so your fixed point binary coefficient will be 105.

One doesn't really need special software for this kind of conversion.

Enjoy!


Antonio wrote:

> I've the coefficient 0.102546681502 that I want to translate in
> 2'complement fixed point binary number having 1 bit for the sign, 1
> bit before the point and 10 bit after, what I have to do ?? Is there
> any software to make this automatically also for the opposite
> conversion ???
> Thanks you a lot
>
> Antonio D'Ottavio
>
> Post a follow-up to this


Article: 32262
Subject: ATPG tools for FPGA
From: Paul Smart <pablo*@*maine.rr.com>
Date: Thu, 21 Jun 2001 16:27:24 GMT
Links: << >>  << T >>  << A >>
Hi All,

I am looking for a tool to generate fault simulated test vectors
(stuck-at faults) for FPGA devices from Xilinx (Virtex) and Altera
(Apex). Ideally the tool would give a brief analysis of testability
issues with the design when fault coverage is low. This would be to
show our customer that low fault coverage was due to the design.

Our previous tool vendor for CPLD and smaller FPGA devices has been
Acugen Software (www.acugen.com). These tools accept Jedec, EDIF and
various other back end files. Acugen may eventually be able to provide
this capability for larger FPGA devices.

We have evaluated TDX from Fluence (www.fluence.com) , but this tool
was designed for use in ASIC design flows. It accepts the Verilog
output files from the Xilinx and Altera tools, but does not currently
model the FPGA primitives and UDPs correctly. Fluence may eventually
provide capability for FPGA devices.

Since FPGAs are non-scan for the purpose of ATPG, this further limits
the list of potential tools.

These are our customer's designs, and we are not allowed to alter the
designs for testability purposes. For future designs, I may be able to
convince their designers to use DFT tools.

Does anyone know of any tools that are suited to this problem?

Thanks for your time,
Paul

Article: 32263
Subject: synplicity 6.2.4 'optimizing' instantiated designs
From: Ray Andraka <ray@andraka.com>
Date: Thu, 21 Jun 2001 16:56:09 GMT
Links: << >>  << T >>  << A >>
Synplicity 6.2 is "optimizing" an instantiated design.  In particular, I

have a design with instantiated Xilinx primitives including a carry
chain.  The synthesis is apparently flattening the xilinx primitives and

doing its own optimization on them, which results in a multiplexer
placed between the xorcy and the flip-flop.  When I instantiate
primitives, I don't expect to see them remapped.  I didn't see this
happening in 5.3.1.  The instantiated primitives have a syn_black_box
attribute on them.   This new 'feature' makes Synplicity useless for the

designs I am doing, and actually does damage for the large base I have
already fielded.

Has anyone else seen this?  Any fixes?



--
-Ray Andraka, P.E.
President, the Andraka Consulting Group, Inc.
401/884-7930     Fax 401/884-7950
email ray@andraka.com
http://www.andraka.com



Article: 32264
Subject: ispDesignExpert fitter question
From: "Lutz Lisseck" <l.lisseck@gmx.de>
Date: Thu, 21 Jun 2001 18:59:17 +0200
Links: << >>  << T >>  << A >>
Hi, is it possible to force the Device Fitter to use a specific device
architecture type like P20V8C? I'm using the schematic design entry in
combination with ABEL modules.

Background: I want to use the complex OLMC Mode insted of the autoselected
simple Mode because of the different feedback paths. But no output use the
tristate feature so the fitter automaticaly selects simple mode.  In the
ABEL modul for my output latches I used the following statement:
"device_id DEVICE 'P20V8C' ;"
but the fitter seems to ignore it.
When I try to force the fitter to use the tristate mode by applying the
following eqation "Q.OE = 1;" I just the following error from the fitter:
"Note 4072: Signal ROM_A18 cannot be assigned (to pin 22) because
the enable equation on pin 22 can only be VCC or GND."

Any comments how to tell the fitter to use the device architecture type
P20V8C ?

Thanks in advance

Lutz


Article: 32265
Subject: Re: NT vs W2K (WAS Re: Pin locking in Maxplus2)
From: Ray Andraka <ray@andraka.com>
Date: Thu, 21 Jun 2001 17:02:15 GMT
Links: << >>  << T >>  << A >>
I realize the benefits of win2k, but it doesn't do me any good if the design tools are not
stable running under 2k.  Last year when I tried running win2k, I had numerous problems with
xilinx alliance, synplicity, modelsim and others.  If I can't run those reliably, then I can't
migrate to the new OS.

So my question still remains.  Are these applications  now stable under 2K?

bob elkind wrote:

> Here are five reasons for migrating from NT4 to W2K:
>
> 1.  USB
> If you use a scanner, or multiplie printers, or a digital camera, or a portable ZIP drive;
> USB is a much better connectivity implementation and architecture.
>
> 2.  True Plug'n'Play -- NT4SPxx has a sorta OK PnP implementation, but with W2K
> it was designed in from the start.  It really does make a difference.
>
> 3.  Support for >8GB disks on boot drive.
> With NT, support for large drives (>8GB) on the boot drive is conditional...  the boot
> files and records must be within the "first 8GB" of the drive.  This makes restoring the
> OS (or copyig onto a new and larger drive) a problematic process.  The service packs
> add full large drive support, but this happens only after the initial load of the OS.
>
> With W2K, no issues with large drives.  I run with two 60GB drives, and never a
> problem.
>
> 4.  Support for FAT32 partitions
> Do you dual-boot between W98 and NT or W2K?  If so, then you know that the only
> way to pass or share files between the two OSs is through a 2GB (max) FAT16 partition.
> FAT32 partitions disappear in NT, NTFS partitions dissapear in W98.
>
> With W2K I can install 1 copy of an application, and that will be enough for both
> W2K and W98.
>
> 5.  W2K system console
> This is a new facility for repairing a system impaired by a wayward application to
> the point that it won't boot.  It's a lifesaver when under stress.  I've needed it only
> twice, once for  a very badly written device driver and once for trying (in vain) to
> get Adaptec/Roxio Easy CD Creator to install properly.
>
> There are some other subtle differences between NT and W2K, but these 5 are the
> more compelling differences (in my mind).
>
> -- Bob Elkind, fpga design/consulting
> www.aracnet.com/~eteam
> mail to: eteam@aracnet.com
>
> Ray Andraka wrote:
>
> > I was asking for the same reason.  I use NT4 because it is stable and reasonably
> > secure.  I'd like to be able to use USB especially. The user interface is very
> > windows95-like and I haven't had any problems running win95 stuff under NT...except
> > for those applications that need unsupported hardware such as the USB, and the modem
> > extensions that link caller ID into the system.  I tried win2k briefly last year
> > when I upgraded systems but found the likes of xilinx, synplicity and modelsim
> > didn't fare too well.
> >

--
-Ray Andraka, P.E.
President, the Andraka Consulting Group, Inc.
401/884-7930     Fax 401/884-7950
email ray@andraka.com
http://www.andraka.com



Article: 32266
Subject: Re: Pin locking in Maxplus2
From: Ray Andraka <ray@andraka.com>
Date: Thu, 21 Jun 2001 17:06:14 GMT
Links: << >>  << T >>  << A >>
No, it was Window2000 professional.  This was June 2000 when I tried it.  Perhaps the
tools vendors have made changes to support it since then?

Nial Stewart wrote:

> Ray Andraka wrote:
> >
> > I was asking for the same reason.  I use NT4 because it is stable and reasonably
> > secure.  I'd like to be able to use USB especially. The user interface is very
> > windows95-like and I haven't had any problems running win95 stuff under NT...except
> > for those applications that need unsupported hardware such as the USB, and the modem
> > extensions that link caller ID into the system.  I tried win2k briefly last year
> > when I upgraded systems but found the likes of xilinx, synplicity and modelsim
> > didn't fare too well.
>
> From what I've read over the last day, that's surprising.
> Most people who've tried Win2000 report that it's been
> very reliable and would recommend it.
>
> Are you sure you didn't try WinMe which most people seem
> to think should be avoided like the plague?
>
> Nial.

--
-Ray Andraka, P.E.
President, the Andraka Consulting Group, Inc.
401/884-7930     Fax 401/884-7950
email ray@andraka.com
http://www.andraka.com



Article: 32267
Subject: what tools run OK on windows 2000?
From: bob elkind <eteam@aracnet.com>
Date: Thu, 21 Jun 2001 10:41:13 -0700
Links: << >>  << T >>  << A >>
Your friends and colleagues need you!

Time for an ad-hoc poll of the audience:

Please reply if you have *first-hand* experience (go or no-go) running design tool XXXX
[simulater | synthesiser | fpga-back-end-design | schematic capture | version control system | etc. ]
on a windows 2000 professional sytsem.

Please reply (to the newsgroup) with :  tool name, GO - NO-GO result, tool SW version.

Thanks for your help.

Bob Elkind, eteam@aracnet.com
fpga design/consulting


Article: 32268
Subject: Re: what tools run OK on windows 2000?
From: bob elkind <eteam@aracnet.com>
Date: Thu, 21 Jun 2001 10:49:42 -0700
Links: << >>  << T >>  << A >>

--------------DBF5A4F521D1EDFE3EF1B49F
Content-Type: text/plain; charset=us-ascii
Content-Transfer-Encoding: 7bit

Tool              GO-NOGO     Version
====================================================
Orcad Capture        GO        9.2
Altera MAX+2         GO       10.0
Altera Quartus2      GO        1.0
Synplicify           GO         -

-- Bob Elkind  eteam@aracnet.com


bob elkind wrote:

> Your friends and colleagues need you!
>
> Time for an ad-hoc poll of the audience:
>
> Please reply if you have *first-hand* experience (go or no-go) running design tool XXXX
> [simulater | synthesiser | fpga-back-end-design | schematic capture | version control system | etc. ]
> on a windows 2000 professional system.
>
> Please reply (to the newsgroup) with :  tool name, GO - NO-GO result, tool SW version.
>
> Thanks for your help.
>
> Bob Elkind, eteam@aracnet.com
> fpga design/consulting

--------------DBF5A4F521D1EDFE3EF1B49F
Content-Type: text/html; charset=us-ascii
Content-Transfer-Encoding: 7bit

<!doctype html public "-//w3c//dtd html 4.0 transitional//en">
<html>
<tt>Tool&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
GO-NOGO&nbsp;&nbsp;&nbsp;&nbsp; Version</tt>
<br><tt>====================================================</tt>
<br><tt>Orcad Capture&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; GO&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
9.2</tt>
<br><tt>Altera MAX+2&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; GO&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
10.0</tt>
<br><tt>Altera Quartus2&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; GO&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
1.0</tt>
<br><tt>Synplicify&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;
GO&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; -</tt><tt></tt>
<p><tt>-- Bob Elkind&nbsp; eteam@aracnet.com</tt>
<br>&nbsp;
<p>bob elkind wrote:
<blockquote TYPE=CITE>Your friends and colleagues need you!
<p>Time for an ad-hoc poll of the audience:
<p>Please reply if you have *first-hand* experience (go or no-go) running
design tool XXXX
<br>[simulater | synthesiser | fpga-back-end-design | schematic capture
| version control system | etc. ]
<br>on a windows 2000 professional system.
<p>Please reply (to the newsgroup) with :&nbsp; tool name, GO - NO-GO result,
tool SW version.
<p>Thanks for your help.
<p>Bob Elkind, eteam@aracnet.com
<br>fpga design/consulting</blockquote>
</html>

--------------DBF5A4F521D1EDFE3EF1B49F--


Article: 32269
Subject: Re: synplicity 6.2.4 'optimizing' instantiated designs
From: John_H <johnhandwork@mail.com>
Date: Thu, 21 Jun 2001 18:07:35 GMT
Links: << >>  << T >>  << A >>
I've seen logic tossed in between my XORCY and the flop, but my primitives
never got synthesized out.  When I manually enter the carry chain, I still
have my MUXCY and XORCY elements but sometimes other stuff gums up the
works.  In my case, a synchronous reset ended up as LUTs between the XORCY
and the flop but - the really weird thing - I couldn't reproduce the problem
for the synplify apps folks.  The problem "went away."  Maybe I missed a
subtle coding change.

Check to make sure the ins/outs are what you expect with your primitives and
that certain primitives with valid outputs really do disappear;  in all the
hand-coding I've done to force the efficiencies, I haven't come across an
"illegitimate" optimization of my primitives.

Isn't coding in primitives such fun ?!
- John


Ray Andraka wrote:

> Synplicity 6.2 is "optimizing" an instantiated design.  In particular, I
>
> have a design with instantiated Xilinx primitives including a carry
> chain.  The synthesis is apparently flattening the xilinx primitives and
>
> doing its own optimization on them, which results in a multiplexer
> placed between the xorcy and the flip-flop.  When I instantiate
> primitives, I don't expect to see them remapped.  I didn't see this
> happening in 5.3.1.  The instantiated primitives have a syn_black_box
> attribute on them.   This new 'feature' makes Synplicity useless for the
>
> designs I am doing, and actually does damage for the large base I have
> already fielded.
>
> Has anyone else seen this?  Any fixes?
>
> --
> -Ray Andraka, P.E.
> President, the Andraka Consulting Group, Inc.
> 401/884-7930     Fax 401/884-7950
> email ray@andraka.com
> http://www.andraka.com


Article: 32270
(removed)


Article: 32271
Subject: Re: Force routing on an Apex
From: bsulliva@altera.com (Brian_Sullivan)
Date: 21 Jun 2001 13:11:41 -0700
Links: << >>  << T >>  << A >>
Hello,

In Quartus II, you cannot back annotate the routing, only logic cell
placement.  The "Local Routing" option does not constrain the fitter
to place the cells within a local route (in the same or adjacent LAB).
 If the placement is such that a local route can take place, the
"Local Route" option will occur.  If you have your placement where you
want it and all local routes are used, you can then place that option
on the cells to ensure that local routing is used on subsequent
placement and compiles.

In the latest release of Quartus II 1.1, you can constrain placement
of a module and then replicate that exact placement on all instances
of that module through LogicLock.  With this new feature (contact your
local Altera FAE for more details) and the local route option, you can
constrain that path in every instance of the module.

I hope this helps.  If you have any questions, let me know.

Brian

Article: 32272
Subject: Re: FFT limited size input
From: Tom Dillon <tdillon@dilloneng.com>
Date: Thu, 21 Jun 2001 20:27:29 GMT
Links: << >>  << T >>  << A >>
We have a parametric FFT core available that can be configured for any=20=

(power of 2) length. FFT.=20

The VHDL or Verilog code to be synthesized is auto-generated from our=20=

Parametric System Builder tools so that the FFT can run as fast as you=20=

need, only limited by available logic in the target device.

How fast does your 16 point FFT need to operate?

Regards,=20

Tom Dillon
Dillon Engineering, Inc.
http://www.dilloneng.com



>>>>>>>>>>>>>>>>>> Original Message <<<<<<<<<<<<<<<<<<

On 6/21/2001, 7:05:04 AM, finishf@yahoo.com (finish) wrote regarding FFT=
=20
limited size input:


> hello,

> From my modest background, i know that for performing the FFT
> transform on an input signal, i have to extend it, if required, by
> zeros to 2^n.
> FFT is a global transform,i.e the whole input sequence should be
> available.

> In practise, most often we take 1024 or 512, but i see some commercial=

> hardware implementation for just 16 input data.

> How far will this limited input size transform affect the overall
> performance ?

> thanks

> H.S

Article: 32273
Subject: Re: Verilog or VHDL?
From: bsulliva@altera.com (Brian_Sullivan)
Date: 21 Jun 2001 13:32:08 -0700
Links: << >>  << T >>  << A >>
Hi,

I'm just going to give my opinion here.  I prefer VHDL for a couple
reasons.  First, Verilog does not allow variable indexing.  If I have
8 instances of a RAM, I can easily create a 'generate' function and
place them all with the variable for the generate as the index on the
bit-slices for the port map.  This is not allowed in Verilog (at least
I don't know how to do it... if someone knows, please tell me).

Second, Verilog has just (within the past year) allowed for double
indexing on arrays.  So the RAM arrays can now be ram[255:0][7:0]. 
VHDL has allowed this for years (actually you could pretty much always
do it with user defined types).  In the past, that same RAM in Verilog
would have to be ram[2047:0] and you would have to keep the slices
straight in your head.

Combine this with no variable indexing and there could be difficulites
creating functions parameterizable for future use.

Now with that said, I agree with some of the other posts that there
are many types in VHDL that are not in Verilog.  These types make
designing a little more lengthy, but debugging the code is easier
because you will be flagged if you leave something out while Verilog
will assume that you meant it to be tied to ground.

Now with all that being said, I usually only write synthesizable code,
not code for simulation, therefore Verilog may be better for
simulation.

In summary, Verilog is easier to learn, but VHDL is more powerful for
the in depth user.  Hope this helps.  If you have any questions, let
me know.

Brian

Article: 32274
Subject: Re: Gray counter STRUCTURAL (VHDL)
From: manolios@auth.gr (Nikiforakis Manos)
Date: Thu, 21 Jun 2001 20:42:39 +0000 (UTC)
Links: << >>  << T >>  << A >>
This is a multi-part message in MIME format.

------=_NextPart_000_0005_01C0FAAC.72FBD700
Content-Type: text/plain;
	charset="iso-8859-7"
Content-Transfer-Encoding: quoted-printable

Thank you all for your answers. I didnt know about the archives =
(Google/dejanews). Now I have much material to work with.

Nikiforakis Manos

------=_NextPart_000_0005_01C0FAAC.72FBD700
Content-Type: text/html;
	charset="iso-8859-7"
Content-Transfer-Encoding: quoted-printable

<!DOCTYPE HTML PUBLIC "-//W3C//DTD HTML 4.0 Transitional//EN">
<HTML><HEAD>
<META http-equiv=3DContent-Type content=3D"text/html; =
charset=3Diso-8859-7">
<META content=3D"MSHTML 5.50.4134.100" name=3DGENERATOR>
<STYLE></STYLE>
</HEAD>
<BODY bgColor=3D#ffffff>
<DIV><FONT face=3DArial size=3D2>Thank you all for your answers. I didnt =
know about=20
the archives (Google/dejanews). Now I have much material to work=20
with.</FONT></DIV>
<DIV><FONT face=3DArial size=3D2></FONT>&nbsp;</DIV>
<DIV><FONT face=3DArial size=3D2>Nikiforakis =
Manos</FONT></DIV></BODY></HTML>

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